Patents by Inventor Jyoei Kamoi
Jyoei Kamoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6873621Abstract: A system for controlling a bandwidth when receiving and reassembling a consecutive data stream transferred while segmented by AAL1 format cells which enables correct determination of non-P and P formats and reassembly of cells even when error arises in multiple bits including the CSI bit of an AAL1 cell or when adding dummy cells and thereby enabling prevention of a gap in data in a frame, comprising, in a data reassembly unit which reassembles received cells, an 8-cell buffer for storing 8 cells of a cycle of a sequence count (SC) of 0 to 7 and sending the cells out to a later stage after a check unit of a sequence number (SN) field confirms normalcy of the cells and a control unit for control so that the number of P format cells stored in the 8-cell buffer becomes 1 cell when 8 cells are stored in the 8-cell buffer.Type: GrantFiled: January 12, 2001Date of Patent: March 29, 2005Assignee: Fujitsu LimitedInventors: Jyoei Kamoi, Yoshihiro Uchida, Naoki Aihara, Mikio Nakayama, Kazuhito Yasue, Kazuhiko Kumagai
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Patent number: 6446146Abstract: To reduce a scale of the circuit, a number of the external terminals, processing steps in developing a firmware, and a scale of the firmware, a line terminator provided in a device for terminating SONET/SDH lines, each having a different line speed, terminates plural lines, each having a different line speed, and includes a clock generator generating a clock corresponding to each line speed, a line switching circuit for specifying one of the plural lines, a selector for outputting data of one of the plural lines, which is specified by the line switching circuit, and a common processing circuit for processing data of the one line output from the selector, according to a clock corresponding to the line speed generated in the clock generator.Type: GrantFiled: April 22, 1999Date of Patent: September 3, 2002Assignee: Fujitsu LimitedInventors: Tomoyuki Yamaguchi, Jyoei Kamoi, Iwao Tada
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Publication number: 20020093949Abstract: A SOH (101) of a transmission frame of SDH (SONET) is terminated at a sender-side transmitter (3 or 4) and is added to remaining data at a receiver-side transmitter (4 or 3). At the sender-side transmitter (3 or 4), the remaining data (102, 103), including an administrative unit pointer (102) is converted into ATM cells and the ATM cells are sent out to an ATM network (2). After that, at the receiver-side transmitter (4 or 3), the remaining data is restored from the received ATM cells. As a result, operation, administration, and maintenance are independently performed over sections disposed at the input and the output sides of the ATM network (2). Further, processes (conversion to ATM cells, restoring SDH frames) are performed irrespective of the difference between the administrative pointer (102) and a payload (103), and the number of the signal paths (104) multiplexed in the payload (103).Type: ApplicationFiled: February 25, 2002Publication date: July 18, 2002Inventors: Kazuhito Yasue, Mikio Makayama, Yoshihiro Uchida, Naoki Aihara, Jyoei Kamoi
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Patent number: 6411620Abstract: The object of the present invention is accomodating local connectionless information (data that is immediately transferred without establishing a path to a receive side), such as LAN data in a local area network, by an asynchronous transfer mode (ATM) network using a connection-oriented communication system (which makes data transfers after verifying that a path to the receive side has been established), thereby performing efficient, fast routing of connectionless information.Type: GrantFiled: November 14, 1997Date of Patent: June 25, 2002Assignee: Fujitsu LimitedInventors: Tadahiro Takase, Kazuo Hajikano, Takeshi Kawasaki, Toshio Shimoe, Tetsuo Tachibana, Teruaki Hagihara, Satoshi Kakuma, Masami Murayama, Ryuichi Takechi, Satoshi Kuroyanagi, Jyoei Kamoi, Hiroshi Tomonaga
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Publication number: 20010017858Abstract: A system for controlling a bandwidth when receiving and reassembling a consecutive data stream transferred while segmented by AAL1 format cells which enables correct determination of non-P and P formats and reassembly of cells even when error arises in multiple bits including the CSI bit of an AAL1 cell or when adding dummy cells and thereby enabling prevention of a gap in data in a frame, comprising, in a data reassembly unit which reassembles received cells, an 8-cell buffer for storing 8 cells of a cycle of a sequence count (SC) of 0 to 7 and sending the cells out to a later stage after a check unit of a sequence number (SN) field confirms normalcy of the cells and a control unit for control so that the number of P format cells stored in the 8-cell buffer becomes 1 cell when 8 cells are stored in the 8-cell buffer.Type: ApplicationFiled: January 12, 2001Publication date: August 30, 2001Applicant: Fujitsu LimitedInventors: Jyoei Kamoi, Yoshihiro Uchida, Naoki Aihara, Mikio Nakayama, Kazuhito Yasue, Kazuhiko Kumagai
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Patent number: 6212186Abstract: The invention concerns an ATM exchange, and is directed in particular to the provision of a cell bandwidth control apparatus for performing bandwidth control for ATM cells sent from the ATM exchange onto the line side. The cell bandwidth control apparatus includes forced empty cell inserting means for forcibly inserting empty cells in a highway connected to an ATM switch. The forced empty cell inserting means inserts forced empty cells in an outgoing highway leading from the ATM switch to a line adapter and thereby limits the line bandwidth of the outgoing highway to within the bandwidth of the line accommodated in the line adapter.Type: GrantFiled: November 26, 1997Date of Patent: April 3, 2001Assignee: Fujitsu LimitedInventors: Iwao Tada, Jyoei Kamoi, Tomoyuki Yamaguchi, Naoki Aihara
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Patent number: 6031820Abstract: A method and device for controlling transfer of cells in an ATM equipment, using the statistical multiplexing effect to control the transfer speed at regular intervals, so as to realize an efficient management and a fine control of the information transfer speed. The cell control device includes a cell transfer control buffer, a cell transfer timing operating unit that performs a desired operation to calculate a cell transfer timing, using a first parameter T and a second parameter X, and a cell transfer control unit that controls the transfer timing of the cell from the buffer, based on the result from the cell transfer timing operating unit, to perform a cell transfer control at a peak rate of X/T in correspondence with a processing rate of the ATM equipment.Type: GrantFiled: April 15, 1997Date of Patent: February 29, 2000Assignee: Fujitsu LimitedInventors: Takeshi Kawasaki, Jyoei Kamoi
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Patent number: 6026098Abstract: A plurality of input lines are respectively connected to separate multiplexing units that are connected in cascade by cascading lines. Select signals are transferred in parallel with fixed length packets over the cascading lines. Each separate multiplexing unit is responsive to a select signal received from the cascading line to select one of fixed length packets received over the corresponding input line and the upstream cascading line and output it over the downstream cascading line. The most downstream separate multiplexing unit provides a multiplexed output of the input lines.Type: GrantFiled: September 16, 1997Date of Patent: February 15, 2000Assignee: Fujitsu LimitedInventors: Jyoei Kamoi, Tomoyuki Yamaguchi, Mikio Nakayama, Yuzo Okuyama
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Patent number: 5809012Abstract: A communication system for use with a network for transmitting fixed-length cells from a transmitting terminal via a virtual connection in the network to a receiving terminal.Type: GrantFiled: May 4, 1995Date of Patent: September 15, 1998Assignee: Fujitsu LimitedInventors: Tadahiro Takase, Kazuo Hajikano, Takeshi Kawasaki, Toshio Shimoe, Tetsuo Tachibana, Teruaki Hagihara, Satoshi Kakuma, Masami Murayama, Ryuichi Takechi, Satoshi Kuroyanagi, Jyoei Kamoi, Hiroshi Tomonaga
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Patent number: 5734641Abstract: A device for discriminating timeout comprises an event discrimination unit, a calculation unit, a timing storage unit and a timeout discrimination unit. The event discrimination unit outputs each communication information concerning each communication to the calculation unit, when an event indicating a start of timeout discrimination occurred. The calculation unit calculates a timeout timing for every communication on the basis of the each communication information and the timing in which the event has occurred, and writes the calculated timeout timing into the timing storage unit. The timeout discrimination unit compares the timeout timing read out from the timing storage unit for every communication with the present timing, and discriminates that the timeout has occurred in reference to the communication when the present timing exceeds the timeout timing.Type: GrantFiled: February 5, 1997Date of Patent: March 31, 1998Assignee: Fujitsu LimitedInventors: Takeshi Kawasaki, Jyoei Kamoi
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Patent number: 5689501Abstract: A communication system for transmitting a fixed-length cell converted from a variable-length information including data and a destination of the data. The system includes a cell assembly/disassembly device for performing bi-directional conversion between the variable-length information and the fixed-length cell, a routing control device for receiving the fixed-length cell converted from the variable-length information by the cell assembly/disassembly device, for analyzing the destination of the data and for controlling a routing of the fixed-length cell based on the analyzed destination, and having an error detecting device for detecting an error of the variable-length information in the fixed-length cell, and a network for connecting the cell assembly/disassembly device and the routing control device by a fixed capacity path and for connecting the routing control device to another routing control device by the fixed capacity path or a variable capacity path.Type: GrantFiled: May 4, 1995Date of Patent: November 18, 1997Assignee: Fujitsu LimitedInventors: Tadahiro Takase, Kazuo Hajikano, Takeshi Kawasaki, Toshio Shimoe, Tetsuo Tachibana, Teruaki Hagihara, Satoshi Kakuma, Masami Murayama, Ryuichi Takechi, Satoshi Kuroyanagi, Jyoei Kamoi, Hiroshi Tomonaga
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Patent number: 5513191Abstract: An Asynchronous Transfer Mode (ATM) cell error processing system includes a plurality of error detectors for respectively detecting predetermined cell errors and for respectively generating decision signals and an error editing unit which is operatively coupled to the error detector and determines, based on the decision signals, whether or not a cell related to the decision signals should be discarded. A buffer, which is coupled to at least one of the error detectors, temporarily stores the cell. An error cell discarding unit, which is coupled to the error editing unit and the buffer, discards the cell from the buffer when the error editing unit determines that the cell should be discarded and relays the cell when the error editing unit determines that the cell should not be discarded.Type: GrantFiled: May 27, 1992Date of Patent: April 30, 1996Assignee: Fujitsu LimitedInventors: Ryuichi Takechi, Takeshi Kawasaki, Jyoei Kamoi, Kazuo Hajikano, Satoshi Kuroyanagi, Toshio Shimoe
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Patent number: 5335222Abstract: A call admission control system in an asynchronous transfer mode exchange includes a unit for describing attribute parameters of a cell from the subscriber terminal; a unit for calculating, based on the attribute parameters, the average and the dispersion of the traffic speeds of the call; a unit for managing data of the average and the dispersion on each output route and data relating to each subscriber; and a unit for calculating the total average and the total dispersion of the data speeds on the selection output route; and a unit for calculating prediction values of cell abandon rate and end-to-end delay based on the average and the dispersion on the selected output route calculated by the total average and dispersion calculating unit, and for comparing the prediction values with the required service quality of cell discard rate and end-to end delay, for determining whether or not the requesting call may be connected.Type: GrantFiled: June 15, 1993Date of Patent: August 2, 1994Assignee: Fujitsu LimitedInventors: Jyoei Kamoi, Hichiro Hayami, Yuji Kato, Toshio Shimoe, Shunji Abe, Michio Kusayanagi, Haruo Mukai, Toshio Soumiya
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Patent number: 5280483Abstract: A call admission control system in an asynchronous transfer mode exchange includes a unit for describing attribute parameters of a call from the subscriber terminal; a unit for calculating, based on the attribute parameters, the average and the dispersion of the traffic speeds of the call; a unit for managing data of the average and the dispersion on each output route and data relating to each subscriber; and a unit for calculating the total average and the total dispersion of the data speeds on the selected output route; and a unit for calculating prediction values of cell abandon rate and end-to-end delay based on the average and the dispersion on the selected output route calculated by the total average and dispersion calculating unit, and for comparing the prediction values with the required service quality of cell discard rate and end-to-end delay, for determining whether or not the requesting call may be connected.Type: GrantFiled: August 9, 1991Date of Patent: January 18, 1994Assignee: Fujitsu LimitedInventors: Jyoei Kamoi, Hichiro Hayami, Yuji Kato, Toshio Shimoe, Shunji Abe, Michio Kusayanagi, Haruo Mukai, Toshio Soumiya
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Patent number: 4837855Abstract: An optical space switch is formed in such a manner that switch elements having two inputs and two outputs are arranged in an n.times.n matrix form and optical signals from n input highways are switched to n output highways. The switch elements are connected in such a manner that the optical signals are always passed through the same number of switch elements, from the input highways to the output highways.Type: GrantFiled: August 18, 1987Date of Patent: June 6, 1989Assignee: Fujitsu LimitedInventors: Kazuo Hajikano, Toshio Shimoe, Jyoei Kamoi, Ippei Sawaki, Koso Murakami