Abstract: A medical ventilator capable of early detecting and recognizing types of pneumonia, a gas recognition chip, and a method for recognizing gas thereof are disclosed. The gas recognition chip of the medical ventilator comprises a sensor array, a sensor interface circuit, a stochastic neural network chip, a memory and a microcontroller. The sensor array receives a plurality of multiple types of gases to produce odor signals corresponding to each type of gas. The sensor interface circuit analyzes the odor signals to produce gas pattern signals corresponding to each type of gas. The stochastic neural network chip amplifies the differences between the gas pattern signals and performs dimensional reduction on the gas pattern signals to aid the analysis. The memory stores training data. The microcontroller performs a mixed gas recognizing algorithm to early detect and recognize the type of the pneumonia according to the gas training data.

Abstract: A medical ventilator capable of early detecting and recognizing types of pneumonia, a gas recognition chip, and a method for recognizing gas thereof are disclosed. The gas recognition chip of the medical ventilator comprises a sensor array, a sensor interface circuit, a stochastic neural network chip, a memory and a microcontroller. The sensor array receives a plurality of multiple types of gases to produce odor signals corresponding to each type of gas. The sensor interface circuit analyzes the odor signals to produce gas pattern signals corresponding to each type of gas. The stochastic neural network chip amplifies the differences between the gas pattern signals and performs dimensional reduction on the gas pattern signals to aid the analysis. The memory stores training data. The microcontroller performs a mixed gas recognizing algorithm to early detect and recognize the type of the pneumonia according to the gas training data.

Abstract: A digital defuzzification processor implemented as integrated circuits (ICs). The defuzzification IC processor includes an input port for receiving a plurality of input values and a corresponding set of specific weight and an effective area for each of the input values. The defuzzification IC processor further includes a multiplier for multiplying each of the input values to the corresponding specific weight for generating a plurality of partial-input-weighted-specific-weight, the multiplier further multiplying the each of the input values to the corresponding effective area for generating a plurality of partial-input-weighted-effective-area. The defuzzification IC processor further includes an accumulator for adding each of the plurality of partial input-weighted-specific-weight for generating a summed-input-weighted specific-weight, the accumulator further adding each of the plurality of partial-input-weighted-effective-area for generating a summed-input weighted-effective-area.

Abstract: A digital fuzzy logic processor for generating output data representing a degree of membership function, specifically, a complement-generating circuit that generates complement data for outputting to a one's-complement circuit to determine a degree of membership output. The digital fuzzy logic processor includes an input port, a memory unit for storing a plurality of data and a prescaled base-distance-slope product table, a subtracting and multiplexer circuit to generate relative location signals and relative distance data, and a control unit that controls the processor. The logic processor further includes a pre-scale shifter to generate prescaled relative distance data, an address generator to generate a table address to retrieve a base-distance-slope product from the prescaled base-distance-slope product table, and a post scalar shifter to shift prescaled base-distance-slope products to generate complement data.