Patents by Inventor K. Y. Chang

K. Y. Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5747852
    Abstract: A MOS integrated circuit device fabricated utilizing high energy, high current implanting of ions through a layer of oxide to form heavily doped source and drain regions which are self-aligned with a polysilicon gate. A thick portion of the oxide layer adjacent to the polysilicon gate prevents heavy doping in the substrate next to the gate. The oxide layer is removed and a lightly doped drain (LDD) implant forms an LDD region which is self-aligned with the gate. Using this method the source/drain and LDD implants are performed using only a single mask and etch operation, rather than two mask and etch operations which are necessary using a conventional process.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: May 5, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: K. Y. Chang, Mark I. Gardner, Fred Hause