Patents by Inventor Ka Nang Leung
Ka Nang Leung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7619395Abstract: An End-Point Prediction scheme is described for voltage-mode buck regulators to generate adaptive output voltage to integrated-circuit systems. Internal nodal voltages of the regulator controller are predicted and set automatically by the proposed algorithms and circuits. The settling time of the regulator can therefore be significantly reduced for faster dynamic responses, even with dominant-pole compensation.Type: GrantFiled: July 13, 2006Date of Patent: November 17, 2009Assignee: The Hong Kong University of Science and TechnologyInventors: Kwok Tai Philip Mok, Man Siu, Ka Nang Leung
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Patent number: 7495422Abstract: An area-efficient capacitor-free low-dropout regulator based on a current-feedback frequency compensation technique is disclosed. An implementation of a current feedback block with a single compensation capacitor is used to enable capacitance reduction. The resultant low-dropout regulator does not generally require an off-chip capacitor for stability and is particularly useful for system-on-chip applications.Type: GrantFiled: July 13, 2006Date of Patent: February 24, 2009Assignee: Hong Kong University of Science and TechnologyInventors: Kwok Tai Philip Mok, Sai Kit Lau, Ka Nang Leung
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Patent number: 7285942Abstract: A low-dropout regulator with a single-transistor-control providing improved transient response and stability is disclosed. The single-transistor-control provides a dynamic resistance at the output of the regulator for minimizing undershoot and overshoot, and hence improves transient response. Since the single-control transistor reduces the output resistance of the regulator, the output pole is pushed to a sufficiently high frequency without affecting stability. Therefore, the limited choice of combinations of the output capacitance and its equivalent-series-resistance is substantially relaxed.Type: GrantFiled: March 7, 2006Date of Patent: October 23, 2007Inventors: Tsz Yin Man, Chi Yat Leung, Ka Nang Leung, Philip Kwok Tai Mok, John Man Sun Chan
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Patent number: 7205827Abstract: A low-dropout regulator comprises a high-gain error amplifier having a differential input stage and a single-ended output, a high-swing high-positive-gain second stage with input connecting to the output of the error amplifier and a single-ended output, a p-type MOS transistor with gate terminal connecting to the output of the second stage, source terminal connecting to the supply voltage, and drain terminal to the output of the low-dropout regulator. A first-order high-pass feedback network connects the output of the low-dropout regulator and the positive input of the error amplifier, and a damping-factor-control means comprising a negative gain stage with a feedback capacitor connects the input and output of this gain stage. A capacitor is connected between the output of the error amplifier and the output of the low-dropout regulator, while a voltage reference connects to the negative input of the error amplifier.Type: GrantFiled: December 19, 2003Date of Patent: April 17, 2007Assignee: The Hong Kong University of Science and TechnologyInventors: Ka Nang Leung, Kwok Tai Mok
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Publication number: 20040164789Abstract: A low-dropout regulator comprises a high-gain error amplifier having a differential input stage and a single-ended output, a high-swing high-positive-gain second stage with input connecting to the output of the error amplifier and a single-ended output, a p-type MOS transistor with gate terminal connecting to the output of the second stage, source terminal connecting to the supply voltage, and drain terminal to the output of the low-dropout regulator. A first-order high-pass feedback network connects the output of the low-dropout regulator and the positive input of the error amplifier, and a damping-factor-control means comprising a negative gain stage with a feedback capacitor connects the input and output of this gain stage. A capacitor is connected between the output of the error amplifier and the output of the low-dropout regulator, while a voltage reference connects to the negative input of the error amplifier.Type: ApplicationFiled: December 19, 2003Publication date: August 26, 2004Applicant: The Hong Kong University of Science and TechnologyInventors: Ka Nang Leung, Kwok Tai Mok
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Patent number: 6441680Abstract: A CMOS reference voltage generating circuit is described that produces a reference voltage by taking the difference between the gate-source voltages of two p-type and n-type CMOS transistors operating in the saturation region, one of the gate-source voltages being multiplied by a gain factor. Different circuits are described for situations where the n- or p-type transistors have the greater temperature dependence.Type: GrantFiled: March 29, 2001Date of Patent: August 27, 2002Assignee: The Hong Kong University of Science and TechnologyInventors: Ka Nang Leung, Kwok Tai Philip Mok, Ka Chun Kwok
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Patent number: 6208206Abstract: A three stage amplifier is disclosed provided with a novel frequency compensation technique. Only a single feedback loop with a single compensation capacitance is provided. Instead of a conventional nested compensation technique, damping factor control is provided by means of a fourth gain stage in order to stabilize the amplifier. The resulting amplifier is particularly useful to drive large capacitive loads for low-voltage low-power applications.Type: GrantFiled: February 11, 1999Date of Patent: March 27, 2001Assignee: The Hong Kong University of Science and TechnologyInventors: Ka Nang Leung, Kwok Tai Philip Mok, Wing Hung Ki, Kin On Johnny Sin
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Patent number: RE42116Abstract: A low-dropout regulator comprises a high-gain error amplifier having a differential input stage and a single-ended output, a high-swing high-positive-gain second stage with input connecting to the output of the error amplifier and a single-ended output, a p-type MOS transistor with gate terminal connecting to the output of the second stage, source terminal connecting to the supply voltage, and drain terminal to the output of the low-dropout regulator. A first-order high-pass feedback network connects the output of the low-dropout regulator and the positive input of the error amplifier, and a damping-factor-control means comprising a negative gain stage with a feedback capacitor connects the input and output of this gain stage. A capacitor is connected between the output of the error amplifier and the output of the low-dropout regulator, while a voltage reference connects to the negative input of the error amplifier.Type: GrantFiled: April 16, 2009Date of Patent: February 8, 2011Assignee: The Hong Kong University of Science and TechnologyInventors: Ka Nang Leung, Kwok Tai Philip Mok
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Patent number: RE42335Abstract: A low-dropout regulator with a single-transistor-control providing improved transient response and stability is disclosed. The single-transistor-control provides a dynamic resistance at the output of the regulator for minimizing undershoot and overshoot, and hence improves transient response. Since the single-control transistor reduces the output resistance of the regulator, the output pole is pushed to a sufficiently high frequency without affecting stability. Therefore, the limited choice of combinations of the output capacitance and its equivalent-series-resistance is substantially relaxed.Type: GrantFiled: October 23, 2009Date of Patent: May 10, 2011Assignee: The Hong Kong University of Science and TechnologyInventors: Tsz Yin Man, Chi Yat Leung, Ka Nang Leung, Philip Kwok Tai Mok, John Man Sun Chan