Patents by Inventor Kai-Hsiang Lin

Kai-Hsiang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121373
    Abstract: Disclosed are an image display method and a 3d display system. The method is adapted to the 3d display system including a 3d display device and includes the following steps. A first image and a second image are obtained by splitting an input image according to a 3d image format. Whether the input image is a 3D format image complying with the 3D image format is determined through a stereo matching processing performed on the first image and the second image. An image interweaving process is enabled to be performed on the input image to generate an interweaving image in response to determining that the input image is the 3D format image complying with the 3D image format, and the interweaving image is displayed via the 3D display device.
    Type: Application
    Filed: May 10, 2023
    Publication date: April 11, 2024
    Applicant: Acer Incorporated
    Inventors: Kai-Hsiang Lin, Hung-Chun Chou, Wen-Cheng Hsu, Shih-Hao Lin, Chih-Haw Tan
  • Publication number: 20240107414
    Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Yu-Chieh HUANG, Kuhn-Chang LIN, Jen-Chun CHANG, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yeong Leong CHOO, Chun-Hsiang CHIU, Chihhung HSIEH, Kai-Chun CHENG, Chung Wei LIN
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240046608
    Abstract: A 3D format image detection method and an electronic apparatus using the same are provided. The 3D format image detection method includes the following steps. A first image and a second image are obtained by splitting an input image according to a 3D image format. A 3D matching processing is performed on the first image and the second image to generate a disparity map of the first image and the second image. The matching number of a plurality of first pixels in the first image matched with a plurality of second pixels in the second image is calculated according to the disparity map. Whether the input image is a 3D format image conforming to the 3D image format is determined according to the matching number.
    Type: Application
    Filed: December 2, 2022
    Publication date: February 8, 2024
    Applicant: Acer Incorporated
    Inventors: Kai-Hsiang Lin, Hung-Chun Chou, Wen-Cheng Hsu, Shih-Hao Lin, Chih-Haw Tan
  • Patent number: 11840047
    Abstract: A metal-clad laminate, a printed circuit board using the same and a method for manufacturing the metal-clad laminate. The metal-clad laminate comprises: a first dielectric layer, comprising a first dielectric material and not comprising a reinforcing fabric, the first dielectric material comprising 20 wt % to 60 wt % of a first fluoropolymer and 40 wt % to 80 wt % of a first filler; a second dielectric layer disposed on one side of the first dielectric layer and comprising a reinforcing fabric and a second dielectric material formed on the surface of the reinforcing fabric, wherein the thickness of the reinforcing fabric is not higher than 65 ?m and the second dielectric material comprises 55 wt % to 100 wt % of a second fluoropolymer and 0 to 45 wt % of a second filler; and a metal foil disposed on the other side of the second dielectric layer that is opposite to the first dielectric layer.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: December 12, 2023
    Assignee: TAIWAN UNION TECHNOLOGY CORPORATION
    Inventors: Shi-Ing Huang, Shur-Fen Liu, Kai-Hsiang Lin
  • Patent number: 11573077
    Abstract: Methods and systems for measuring optical properties of transistor channel structures and linking the optical properties to the state of strain are presented herein. Optical scatterometry measurements of strain are performed on metrology targets that closely mimic partially manufactured, real device structures. In one aspect, optical scatterometry is employed to measure uniaxial strain in a semiconductor channel based on differences in measured spectra along and across the semiconductor channel. In a further aspect, the effect of strain on measured spectra is decorrelated from other contributors, such as the geometry and material properties of structures captured in the measurement. In another aspect, measurements are performed on a metrology target pair including a strained metrology target and a corresponding unstrained metrology target to resolve the geometry of the metrology target under measurement and to provide a reference for the estimation of the absolute value of strain.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: February 7, 2023
    Assignee: KLA Corporation
    Inventors: Houssam Chouaib, Aaron Rosenberg, Kai-Hsiang Lin, Dawei Hu, Zhengquan Tan
  • Publication number: 20210293532
    Abstract: Methods and systems for measuring optical properties of transistor channel structures and linking the optical properties to the state of strain are presented herein. Optical scatterometry measurements of strain are performed on metrology targets that closely mimic partially manufactured, real device structures. In one aspect, optical scatterometry is employed to measure uniaxial strain in a semiconductor channel based on differences in measured spectra along and across the semiconductor channel. In a further aspect, the effect of strain on measured spectra is decorrelated from other contributors, such as the geometry and material properties of structures captured in the measurement. In another aspect, measurements are performed on a metrology target pair including a strained metrology target and a corresponding unstrained metrology target to resolve the geometry of the metrology target under measurement and to provide a reference for the estimation of the absolute value of strain.
    Type: Application
    Filed: June 3, 2021
    Publication date: September 23, 2021
    Inventors: Houssam Chouaib, Aaron Rosenberg, Kai-Hsiang Lin, Dawei Hu, Zhengquan Tan
  • Patent number: 11060846
    Abstract: Methods and systems for measuring optical properties of transistor channel structures and linking the optical properties to the state of strain are presented herein. Optical scatterometry measurements of strain are performed on metrology targets that closely mimic partially manufactured, real device structures. In one aspect, optical scatterometry is employed to measure uniaxial strain in a semiconductor channel based on differences in measured spectra along and across the semiconductor channel. In a further aspect, the effect of strain on measured spectra is decorrelated from other contributors, such as the geometry and material properties of structures captured in the measurement. In another aspect, measurements are performed on a metrology target pair including a strained metrology target and a corresponding unstrained metrology target to resolve the geometry of the metrology target under measurement and to provide a reference for the estimation of the absolute value of strain.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: July 13, 2021
    Assignee: KLA Corporation
    Inventors: Houssam Chouaib, Aaron Rosenberg, Kai-Hsiang Lin, Dawei Hu, Zhengquan Tan
  • Publication number: 20210060900
    Abstract: A metal-clad laminate, a printed circuit board using the same and a method for manufacturing the metal-clad laminate. The metal-clad laminate comprises: a first dielectric layer, comprising a first dielectric material and not comprising a reinforcing fabric, the first dielectric material comprising 20 wt % to 60 wt % of a first fluoropolymer and 40 wt % to 80 wt % of a first filler; a second dielectric layer disposed on one side of the first dielectric layer and comprising a reinforcing fabric and a second dielectric material formed on the surface of the reinforcing fabric, wherein the thickness of the reinforcing fabric is not higher than 65 ?m and the second dielectric material comprises 55 wt % to 100 wt % of a second fluoropolymer and 0 to 45 wt % of a second filler; and a metal foil disposed on the other side of the second dielectric layer that is opposite to the first dielectric layer.
    Type: Application
    Filed: February 6, 2020
    Publication date: March 4, 2021
    Inventors: Shi-Ing HUANG, Shur-Fen LIU, Kai-Hsiang LIN
  • Publication number: 20200200525
    Abstract: Methods and systems for measuring optical properties of transistor channel structures and linking the optical properties to the state of strain are presented herein. Optical scatterometry measurements of strain are performed on metrology targets that closely mimic partially manufactured, real device structures. In one aspect, optical scatterometry is employed to measure uniaxial strain in a semiconductor channel based on differences in measured spectra along and across the semiconductor channel. In a further aspect, the effect of strain on measured spectra is decorrelated from other contributors, such as the geometry and material properties of structures captured in the measurement. In another aspect, measurements are performed on a metrology target pair including a strained metrology target and a corresponding unstrained metrology target to resolve the geometry of the metrology target under measurement and to provide a reference for the estimation of the absolute value of strain.
    Type: Application
    Filed: October 22, 2019
    Publication date: June 25, 2020
    Inventors: Houssam Chouaib, Aaron Rosenberg, Kai-Hsiang Lin, Dawei Hu, Zhengquan Tan
  • Patent number: 8718385
    Abstract: A method for identifying siding includes receiving particular texture data associated with a physical texture of a particular siding sample, accessing a reference database including reference texture data associated with physical texture of multiple different reference siding samples, performing an automated texture data analysis by analyzing the particular texture data associated with the particular siding sample and the reference texture data associated with different reference siding samples, and automatically identifying at least one reference siding sample that matches the particular siding sample based at least on the automated texture data analysis. The particular texture data associated with the physical texture of the particular siding sample may comprise a digital image, such as a photographic or scanned image of the particular siding sample, or a photographic or scanned image of an ink image physically transferred from the particular siding sample onto a substrate.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: May 6, 2014
    Assignee: State Farm Mutual Automobile Insurance Company
    Inventors: Kai-Hsiang Lin, Rosemarie Geier Grant, Joshua M. Mast, Douglas L. Dewey, Charlie K. Dagli
  • Publication number: 20140023280
    Abstract: A method for identifying siding includes receiving particular texture data associated with a physical texture of a particular siding sample, accessing a reference database including reference texture data associated with physical texture of multiple different reference siding samples, performing an automated texture data analysis by analyzing the particular texture data associated with the particular siding sample and the reference texture data associated with different reference siding samples, and automatically identifying at least one reference siding sample that matches the particular siding sample based at least on the automated texture data analysis. The particular texture data associated with the physical texture of the particular siding sample may comprise a digital image, such as a photographic or scanned image of the particular siding sample, or a photographic or scanned image of an ink image physically transferred from the particular siding sample onto a substrate.
    Type: Application
    Filed: July 23, 2012
    Publication date: January 23, 2014
    Applicant: State Farm Insurance
    Inventors: Kai-Hsiang Lin, Rosemarie Geier Grant, Joshua M. Mast, Douglas L. Dewey, Charlie K. Dagli
  • Publication number: 20120023441
    Abstract: This disclosure provides an electronic device and a method for displaying an event used for presenting a first type of event and a second type of event to a user. The method includes the following steps. A time interval inputted by the user is received. A record of the first type of event and a record of the second type of event are searched according to the time interval to determine whether there are the first type of event and the second type of event taking place in the time interval. A first related information of the first type of event and a second related information of the second type of event taking place in the time interval are displayed. Displaying locations of the first related information and the second related information indicate time when the first type of event and the second type of event take place, respectively.
    Type: Application
    Filed: July 25, 2011
    Publication date: January 26, 2012
    Applicant: PEGATRON CORPORATION
    Inventors: Chia-Hsun Wu, Kai-Hsiang Lin
  • Patent number: D852842
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: July 2, 2019
    Assignee: Beijing Kingsoft Internet Security Software Co., Ltd.
    Inventors: Ting-Jiun Hung, Kai-Hsiang Lin, Chieh-Tun Yang, Yi-Wen Chang, Tzu-Jung Huang
  • Patent number: D857034
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: August 20, 2019
    Assignee: BEIJING KINGSOFT INTERNET SECURITY SOFTWARE CO., LTD.
    Inventors: Ting-Jiun Hung, Kai-Hsiang Lin, Chieh-Tun Yang, Yi-Wen Chang, Tzu-Jung Huang
  • Patent number: D924928
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: July 13, 2021
    Assignee: BEIJING KINGSOFT INTERNET SECURITY SOFTWARE CO., LTD.
    Inventors: Wei-Hung Jan, Kai-Hsiang Lin