Patents by Inventor Kai Hsu

Kai Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220310902
    Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.
    Type: Application
    Filed: April 28, 2021
    Publication date: September 29, 2022
    Inventors: Hui-Lin Wang, Ching-Hua Hsu, Si-Han Tsai, Shun-Yu Huang, Chen-Yi Weng, Ju-Chun Fan, Che-Wei Chang, Yi-Yu Lin, Po-Kai Hsu, Jing-Yin Jhang, Ya-Jyuan Hung
  • Publication number: 20220310697
    Abstract: A semiconductor memory device includes a substrate having a memory area and a logic circuit area thereon, a first interlayer dielectric layer on the substrate, and a second interlayer dielectric layer on the substrate. An embedded memory cell structure is disposed within the memory area between the first interlayer dielectric layer and the second interlayer dielectric layer. The second interlayer dielectric layer includes a first portion covering the embedded memory cell structure within the memory area and a second portion covering the logic circuit area. A top surface of the first portion is coplanar with a top surface of the second portion.
    Type: Application
    Filed: April 13, 2021
    Publication date: September 29, 2022
    Inventors: Hui-Lin Wang, Si-Han Tsai, Ching-Hua Hsu, Chen-Yi Weng, Po-Kai Hsu
  • Patent number: 11451740
    Abstract: A video-image-interpolation apparatus is provided, which includes at least three image-layering circuits, at least three motion-estimation circuits, a motion-estimation-filtering circuit, a motion-compensated frame-interpolation circuit, and a display-control circuit. Each motion-estimation circuit performs motion estimation on a reference image-layer sequence and a reference subtitle-layer sequence that are generated from an input video signal by each image-layering circuit. The motion-estimation-filtering circuit adaptively determines the motion-estimation circuit having the smallest motion error.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: September 20, 2022
    Assignee: TERAWINS, INC.
    Inventors: Yu-Kuang Wang, Wen-Yi Huang, Pei-Kai Hsu
  • Publication number: 20220292727
    Abstract: A class-specific neural network for video compressed sensing and methods for training and testing the class-specific neural network are provided. The class-specific neural network includes a Gaussian-mixture model (GMM) and a plurality of encoders, where the GMM classifies video frame blocks with a plurality of clusters and assigns the video frame blocks to the plurality of clusters. Further, the plurality of encoders receive the video frame blocks and generate a plurality of compressed-sensed frame block vectors, where the plurality of encoders correspond to the plurality of clusters.
    Type: Application
    Filed: March 15, 2022
    Publication date: September 15, 2022
    Applicants: KWAI INC., SANTA CLARA UNIVERSITY
    Inventors: Yifei PEI, Ying LIU, Nam LING, Lingzhi LIU, Yongxiong REN, Ming Kai HSU
  • Publication number: 20220275725
    Abstract: This disclosure relates to a separating a fluid having multiple phases during formation testing. For example, certain embodiments of the present disclosure relate to receiving contaminated formation fluid on a first flow line and separating a contamination (e.g., mud filtrate) from the formation fluid by diverting the relatively heavier and/or denser fluid (e.g., the mud filtrate) downward through a second flow line and diverting the relatively lighter and/or less dense fluid upward through a third flow line. In some embodiments, the third flow line is generally oriented upwards at a height that may facilitate the separation of the heavier fluid from the relatively lighter fluid based on gravity and/or pumps.
    Type: Application
    Filed: May 16, 2022
    Publication date: September 1, 2022
    Inventors: Thomas Pfeiffer, Ashers Partouche, Kai Hsu, Simon Edmundson
  • Publication number: 20220277910
    Abstract: A system may comprise a printed circuit board (PCB) including a top surface, and a bracket including a top surface configured to receive and couple to a key switch and a bottom surface including at least two protrusions that extend normal to the bottom surface of the bracket. The bracket can be configured to mount to the PCB such that the bottom surface of the bracket is coupled to the top surface of the PCB, and the at least two protrusions may each include conductive leads that couple to the top surface of the PCB. The bracket is configured to only cover a portion of a bottom surface of the key switch when coupled to the key switch. An LED can be mounted to the top surface of the PCB, laterally adjacent to the bracket, and under the key switch at a location not covered by the bracket.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 1, 2022
    Inventors: Feng-Hao Lin, Yu-Chun Sun, Lien Hsing Chen, Fu-Kai Hsu
  • Publication number: 20220271666
    Abstract: A transient response improving system and method with a prediction mechanism of an error amplified signal are provided. A current sensor circuit senses a current flowing through a first resistor connected between an adapter and an electronic device. When the current is larger than a current threshold, a predicting circuit calculates a target voltage level based on a common voltage and a voltage of the battery and instantly pulls up or down a voltage level of the error amplified signal to the target voltage level. A comparator compares the error amplified signal with a ramp signal to output a comparison signal. A controller circuit controls a driver circuit to switch a high-side switch and a low-side switch according to the comparison signal.
    Type: Application
    Filed: June 30, 2021
    Publication date: August 25, 2022
    Inventors: CHUN-KAI HSU, CHIH-HENG SU
  • Publication number: 20220271088
    Abstract: A memory array includes at least one strap region having therein a plurality of source line straps and a plurality of word line straps, and at least two sub-arrays having a plurality of staggered, active magnetic storage elements. The at least two sub-arrays are separated by the strap region. A plurality of staggered, dummy magnetic storage elements is disposed within the strap region.
    Type: Application
    Filed: March 15, 2021
    Publication date: August 25, 2022
    Inventors: Po-Kai Hsu, Hui-Lin Wang, Kun-I Chou, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Hung-Yueh Chen
  • Patent number: 11425331
    Abstract: A method of region-based video-image interpolation is provided, which includes the following steps: respectively dividing each image and its subsequent image in an input video signal into first regions and second regions to obtain first regional images and second regional images; performing a motion-compensated frame-interpolation process on the first regional image and the second regional image in the same position in each image and its subsequent image to obtain an interpolated regional image; performing a frame-rate-conversion process on reference images and the interpolated regional images of each first region according to an original frame rate of each first region and a display frame rate of an output video signal to obtain a regional output image of each first region; and superimposing the regional output image generated at each output timestamp by each motion-compensated frame-interpolation circuit to generate an output image of the output video signal.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: August 23, 2022
    Assignee: TERAWINS, INC.
    Inventors: Yu-Kuang Wang, Wen-Yi Huang, Pei-Kai Hsu
  • Publication number: 20220263017
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a cap layer adjacent to and directly contacting the MTJ, a first inter-metal dielectric (IMD) layer around the MTJ, a top electrode on the MTJ, a metal interconnection under the MTJ, and a second IMD layer around the metal interconnection. Preferably, the cap layer is a single layer structure made of dielectric material and an edge of the cap layer contacts the first IMD layer directly.
    Type: Application
    Filed: May 5, 2022
    Publication date: August 18, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Po-Kai Hsu, Hung-Yueh Chen, Yu-Ping Wang
  • Publication number: 20220263016
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) stack on a substrate; forming a top electrode on the MTJ stack; performing a first patterning process to remove the MTJ stack for forming a first MTJ; forming a first inter-metal dielectric (IMD) layer around the first MTJ; and performing a second patterning process to remove the first MTJ for forming a second MTJ and a third MTJ.
    Type: Application
    Filed: May 3, 2022
    Publication date: August 18, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Po-Kai Hsu, Hung-Yueh Chen, Yu-Ping Wang
  • Patent number: 11417838
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first metal interconnection and a second metal interconnection in the first IMD layer; forming a channel layer on the first metal interconnection and the second metal interconnection; forming a magnetic tunneling junction (MTJ) stack on the channel layer; and removing the MTJ stack to form a MTJ.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: August 16, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Wei Chen, Po-Kai Hsu, Yu-Ping Wang, Hung-Yueh Chen
  • Patent number: 11417564
    Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure dividing the fin-shaped structure into a first portion and a second portion as the SDB structure includes a bottom portion in the fin-shaped structure and a top portion on the bottom portion, a spacer around the top portion, a first epitaxial layer adjacent to one side of the top portion, and a second epitaxial layer adjacent to another side of the top portion.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: August 16, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Chun-Ya Chiu, Chi-Ting Wu, Chin-Hung Chen, Yu-Hsiang Lin
  • Patent number: 11408244
    Abstract: The disclosure provides for a method for setting an inflatable packer. The method includes positioning an inflatable packer within a borehole, and pumping fluid into an inflatable element of the inflatable packer using a pump that is driven by a motor. The method includes measuring pressure of the inflatable element, determining a derivative of the measured pressure with respect to time, and determining onset of restraining of the inflatable element has occurred. Upon or after determining the onset of restraining, the method includes turning off the motor or slowing down an rpm of the motor. The disclosure also provides for a system, including a computer readable medium with processor-executable instructions stored thereon that are configured to instruct a processor to execute a pressure control algorithm to control a speed of the motor in response to pressure measurement data from the pressure sensor.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: August 9, 2022
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Bo Yang, Kai Hsu, Deopaul Dindial
  • Publication number: 20220246212
    Abstract: A memory device and an operation method thereof are provided. The operation method comprises: in performing a multiply accumulate (MAC) operation, inputting a plurality of inputs into a plurality of memory cells via a plurality of first signal lines; outputting a plurality of cell currents from the memory cells to a plurality of second signal lines based on a plurality of weights of the memory cells; summing the cell currents on each of the second signal lines into a plurality of signal line currents: summing the signal line currents into a global signal line current: and converting the global signal line current into an output, wherein the output represents a MAC operation result of the inputs and the weights.
    Type: Application
    Filed: September 15, 2021
    Publication date: August 4, 2022
    Inventors: Hang-Ting LUE, Po-Kai HSU
  • Publication number: 20220246195
    Abstract: A three-dimension (3D) memory device and an operation method thereof are provided. The 3D memory device includes: a memory array including a plurality of memory cells; a controller coupled to the memory array; and a match circuit coupled to memory array, wherein in data search and match, the controller selects from the memory cells a plurality of target memory cells sharing a same target global signal line, and the controller selects a plurality of target word lines sharing the target global signal line as a plurality of target search lines, wherein a search data sends to the target memory cells via the target search lines for data matching; the target global signal line is precharged; and outputting a match address based on whether a voltage on the target global signal line is pulled down or not.
    Type: Application
    Filed: May 17, 2021
    Publication date: August 4, 2022
    Inventors: Po-Kai HSU, Teng-Hao YEH, Hang-Ting LUE
  • Publication number: 20220238617
    Abstract: A display device includes: a substrate; a data line disposed on the substrate; an another data line disposed on the substrate and adjacent to the data line; a first light emitting diode including a first electrode; and a second light emitting diode including an another first electrode, wherein the first electrode partially overlaps the data line, the another first electrode partially overlaps the another data line, and an area of the first electrode and an area of the another first electrode are different.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Inventors: Lien-Hsiang CHEN, Kung-Chen KUO, Sheng-Kai HSU, Hsia-Ching CHU, Mei-Chun SHIH
  • Patent number: 11398268
    Abstract: A three-dimension (3D) memory device and an operation method thereof are provided. The 3D memory device includes: a memory array including a plurality of memory cells; a controller coupled to the memory array; and a match circuit coupled to memory array, wherein in data search and match, the controller selects from the memory cells a plurality of target memory cells sharing a same target global signal line, and the controller selects a plurality of target word lines sharing the target global signal line as a plurality of target search lines, wherein a search data sends to the target memory cells via the target search lines for data matching; the target global signal line is precharged; and outputting a match address based on whether a voltage on the target global signal line is pulled down or not.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: July 26, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Po-Kai Hsu, Teng-Hao Yeh, Hang-Ting Lue
  • Patent number: 11384637
    Abstract: Embodiments of the disclosure can include systems and methods for formation fluid sampling. In one embodiment, a method can include monitoring a relationship between a first characteristic of a formation fluid extracted from a formation and a second characteristic of the formation fluid extracted from the formation, determining, based at least in part on the monitoring, that a linear trend is exhibited by the relationship between the first characteristic of the formation fluid extracted from the formation and the second characteristic of the formation fluid extracted from the formation, and determining a reservoir fluid breakthrough based at least in part on the identification of the linear trend, wherein the reservoir fluid breakthrough is indicative of virgin reservoir fluid entering a sampling tool.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: July 12, 2022
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Kai Hsu, Adriaan Gisolf, Youxiang Zuo, Yong Chang, Beatriz E. Barbosa
  • Publication number: 20220216270
    Abstract: An integrated circuit (IC) device includes a substrate and a circuit region over the substrate. The circuit region includes at least one active region extending along a first direction, at least one gate region extending across the at least one active region and along a second direction transverse to the first direction, and at least one first input/output (IO) pattern configured to electrically couple the circuit region to external circuitry outside the circuit region. The at least one first IO pattern extends along a third direction oblique to both the first direction and the second direction.
    Type: Application
    Filed: January 4, 2021
    Publication date: July 7, 2022
    Inventors: Meng-Kai HSU, Jerry Chang Jui KAO, Chin-Shen LIN, Ming-Tao YU, Tzu-Ying LIN, Chung-Hsing WANG