Abstract: A motor detection method includes the following steps. An excitation current command is provided to a motor device, and the motor device is driven to rotate at the first angle. The first feedback angle of the motor device in the first resting position is detected and obtained. The motor device is driven to rotate at the second angle according to the excitation current command. The second feedback angle of the motor device in the second resting position is detected and obtained. The magnetic pole offset angle of the motor device is calculated according to the first feedback angle and the second feedback angle.

Abstract: A method includes forming a gate structure on a substrate, forming a seal spacer covering a sidewall of the gate structure, forming a sacrificial spacer covering a sidewall of the seal spacer, forming source/drain regions sandwiching a channel region that is under the gate structure, and depositing a contact etch stop layer covering a sidewall of the sacrificial spacer. The method further includes removing the sacrificial spacer to form a trench, wherein the trench exposes a sidewall of the contact etch stop layer and the sidewall of the seal spacer, and depositing an inter-layer dielectric layer, wherein the inter-layer dielectric layer caps the trench, thereby defining an air gap inside the trench.

Abstract: A device for aligning light-emitting diodes (LEDs) by using a carrier substrate is provided. The carrier substrate defines a plurality of positioning grooves, and each positioning groove is configured for accommodating one of the LEDs. The device includes a carrying part for carrying the carrier substrate, a vibration part connected to the carrying part and for vibrating the carrier substrate, and a magnetic generator on a side of the carrier substrate away from the positioning grooves. A method for aligning LEDs is also provided.

Abstract: A cross-coupling structure for dielectric cavity filters includes a base and a tuner. The base is communicated with plural resonant cavities, a side through hole and a blind hole, and has a first channel formed between two adjacent resonant cavities which are not used for producing cross-coupling, and a second channel the resonant cavities formed between two adjacent resonant cavities which are used for producing cross-coupling. The side through hole is penetrated through the base and communicated with the second channel. The blind hole is formed on a wall of the second channel and has an opening facing the side through hole. The tuner is entered into the second channel from the side through hole and extended into the blind hole and can be adjustably moved between the opening of the blind hole and the bottom of the blind hole to set a cross-coupling amount target value.

Abstract: A gapless ferrite structure for circulator or isolator includes a first base having a first flange and a first limit slot surrounded by the first flange, a second base having a second flange and a second limit slot surrounded by the second flange, a ferrite with two ends accommodated in the first limit slot and the second limit slot respectively, two limit magnets installed on the first base and the second base respectively and configured to be corresponsive to the ferrite to generate an attraction force on the ferrite, and two sealing units configured between an end of the ferrite and the first limit slot and between the other end of the ferrite and the second limit slot respectively. In this way, a gapless structure can be formed on a signal transmission path in a circulator or isolator.

Abstract: A method of manufacturing a circuit pattern structure, a measurement method, and a circuit pattern structure are provided. The method of manufacturing the circuit pattern structure includes: forming a dielectric layer; forming at least one first pad at least partially in the dielectric layer; forming a second pad adjacent to the at least one first pad and having a height greater than that of the at least one first pad.

Abstract: An embodiment method includes: forming fins extending from a semiconductor substrate; depositing an inter-layer dielectric (ILD) layer on the fins; forming masking layers on the ILD layer; forming a cut mask on the masking layers, the cut mask including a first dielectric material, the cut mask having first openings exposing the masking layers, each of the first openings surrounded on all sides by the first dielectric material; forming a line mask on the cut mask and in the first openings, the line mask having slot openings, the slot openings exposing portions of the cut mask and portions of the masking layers, the slot openings being strips extending perpendicular to the fins; patterning the masking layers by etching the portions of the masking layers exposed by the first openings and the slot openings; and etching contact openings in the ILD layer using the patterned masking layers as an etching mask.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a shallow trench isolation (STI) in a substrate, forming a first gate structure on the substrate and adjacent to the STI, forming a first doped region between the first gate structure and the STI, forming a second doped region between the first doped region and the first gate structure, forming a first contact plug on the first doped region, and then forming a second contact plug on the second doped region.

Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.

Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.

Abstract: The present invention relates to an antagonist of interleukin-17B receptor (IL-17RB) which features interruption of the interaction of IL-17RB and MLK4. The present invention also relates to use of such antagonist for treatment of diseases or disorders associated with IL-17RB activation. Further disclosed is a phosphorylated IL-17RB as a biomarker for predicting prognosis and/or monitoring progression of cancer.

Abstract: A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region and a first metal interconnection on the MTJ. Preferably, a top view of the MTJ includes a circle and a top view of the first metal interconnection includes an ellipse overlapping the circle.

Abstract: A method and system are provided to construct, from a TensorFlow graph, a common intermediate representation that can be converted to a plurality of compiler intermediate representations (IRs), which enables compiler optimization to be applied efficiently.

Abstract: A computer implemented method includes detecting user interaction with mixed reality displayed content in a mixed reality system. User focus is determined as a function of the user interaction based on the user interaction using a spatial intent model. A length of time for extending voice engagement with the mixed reality system is modified based on the determined user focus. Detecting user interaction with the displayed content may include tracking eye movements to determine objects in the displayed content at which the user is looking and determining a context of a user dialog during the voice engagement.

Abstract: A semiconductor package includes a die having a plurality of devices over a first substrate, where the first substrate includes a dopant at a first concentration and the first substrate has a first width along a horizontal direction. The semiconductor package further includes a second substrate fused with the first substrate, where the second substrate includes the dopant at a second concentration greater than the first concentration.

Abstract: An integrated motor and drive assembly is disclosed and includes a housing, a motor and a drive. The housing includes a motor-accommodation portion and a drive-accommodation portion. The drive includes a power board and a control board. The power board is made of a high thermal conductivity substrate and includes a power element and an encoder disposed on the first side, the first side faces the motor, the power board and the motor are stacked along a first direction, and the second side contacts the housing to from a heat-dissipating route. The control board is disposed adjacent to the power board. The control board and the power board are arranged along a second direction perpendicular to the first direction, and the first direction is parallel to an axial direction of the motor. A part of the power board and a part of the control board are directly contacted to form an electrical connection.

Abstract: The present disclosure is generally related to 3D imaging capable OLED displays. A light field display comprises an array of 3D light field pixels, each of which comprises an array of corrugated OLED pixels, a metasurface layer disposed adjacent to the array of 3D light field pixels, and a plurality of median layers disposed between the metasurface layer and the corrugated OLED pixels. Each of the corrugated OLED pixels comprises primary or non-primary color subpixels, and produces a different view of an image through the median layers to the metasurface to form a 3D image. The corrugated OLED pixels combined with a cavity effect reduce a divergence of emitted light to enable effective beam direction manipulation by the metasurface. The metasurface having a higher refractive index and a smaller filling factor enables the deflection and direction of the emitted light from the corrugated OLED pixels to be well controlled.

Abstract: Embodiments of the present disclosure relate to a FinFET device having gate spacers with reduced capacitance and methods for forming the FinFET device. Particularly, the FinFET device according to the present disclosure includes gate spacers formed by two or more depositions. The gate spacers are formed by depositing first and second materials at different times of processing to reduce parasitic capacitance between gate structures and contacts introduced after epitaxy growth of source/drain regions.

Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.

Abstract: A sealing mechanism is provided, including a housing, a groove, and a sealing element. The housing includes a first member and a second member, and the groove is formed between the first and second members. The sealing element is formed in the groove by Low Pressure Molding (LPM) and surrounds at least one of the first and second members.