Patents by Inventor Kai Mao
Kai Mao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11999387Abstract: A heat dissipation system for a high-speed train running in a low-vacuum tube is provided. Component groups that provide power and resistance for the movement and stop of a train are provided at a periphery, close to the train, in a low-vacuum tube. The component group is provided with a group A cooling assembly. The group A cooling assembly includes a group A cooling-type heat exchanger and/or a group A nozzle assembly attached to the back of the component group. Since the friction between the train running at high speed and the air in the low-vacuum tube and the operation of the key equipment in the low-vacuum tube will generate a lot of heat, the group A cooling assembly in the component group in the low-vacuum tube exchanges the heat with the air in the low-vacuum tube.Type: GrantFiled: February 25, 2021Date of Patent: June 4, 2024Assignees: HEFEI GENERAL MACHINERY RESEARCH INSTITUTE CO., LTD, HEFEI GENERAL ENVIRONMENTAL CONTROL TECHNOLOGY CO., LTD, HIWING TECHNOLOGY ACADEMY OF CASICInventors: Xiuping Zhang, Panpan Zhao, Junfeng Wu, Ru Zhang, Xiaoming Kong, Shuangqing Xu, Dao Zhou, Xudong Yuan, Kai Mao, Na Zhang, Ming Zhao, Shaowei Li, Jinglong Bo
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Publication number: 20240171359Abstract: The present application provides a model training method, a channel adjustment method, an electronic device, and a computer readable storage medium, the model training method includes: collecting historical samples, with the historical samples including first scheduling information and first information corresponding to a historical data transmission, the first information representing a result of cyclic redundancy check, and the first scheduling information including first intermediate variable information in an adaptive modulation and coding process; and performing model training according to the historical samples to obtain a first prediction model, and during the model training, the first scheduling information is used as an input of the first prediction model, the first information is converted into second information corresponding to the historical data transmission to be used as an output of the first prediction model, and the second information represents a probability value of the result of the cycliType: ApplicationFiled: March 14, 2022Publication date: May 23, 2024Inventors: Dexin LI, Qiaoyan LIU, Kai MAO, Jianguo LI, Wangwang JI, Zepeng MA, Ke SHI
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Publication number: 20240153849Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a chip structure including a substrate and a wiring structure over a first surface of the substrate. The semiconductor device structure includes a first seed layer over the wiring structure, a first inner wall of the first enlarged portion, and a second inner wall of the neck portion. The semiconductor device structure includes a second seed layer over a second surface of the substrate, a third inner wall of the second enlarged portion, and the first seed layer over the second inner wall of the neck portion. The second seed layer is in direct contact with the first seed layer.Type: ApplicationFiled: January 2, 2024Publication date: May 9, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Li YANG, Wen-Hsiung LU, Lung-Kai MAO, Fu-Wei LIU, Mirng-Ji LII
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Publication number: 20240131486Abstract: A full-electric drive cementing control system is disclosed.Type: ApplicationFiled: March 15, 2022Publication date: April 25, 2024Applicant: YANTAI JEREH PETROLEUM EQUIPMENT & TECHNOLOGIES CO., LTD.Inventors: Pengyuan ZHANG, Kai WANG, Jihua WAN, Ren LIU, Jun WANG, Song ZHANG, Kaishen LIU, Shuzhen CUI, Zhuqing MAO, Weiwei LIU
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Publication number: 20240120207Abstract: A semiconductor package includes a die having a plurality of devices over a first substrate, where the first substrate includes a dopant at a first concentration and the first substrate has a first width along a horizontal direction. The semiconductor package further includes a second substrate fused with the first substrate, where the second substrate includes the dopant at a second concentration greater than the first concentration.Type: ApplicationFiled: February 15, 2023Publication date: April 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Lung-Kai Mao, Wen-Hsiung Lu, Pei-Wei Lee, Szu-Hsien Lee, Chieh-Ning Feng
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Publication number: 20240096647Abstract: A method includes forming a first package component, which formation process includes forming a first plurality of openings in a first dielectric layer, depositing a first metallic material into the first plurality of openings, performing a planarization process on the first metallic material and the first dielectric layer to form a plurality of metal pads in the first dielectric layer, and selectively depositing a second metallic material on the plurality of metal pads to form a plurality of bond pads. The first plurality of bond pads comprise the plurality of metal pads and corresponding parts of the second metallic material. The first package component is bonded to a second package component.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Mirng-Ji Lii, Chen-Shien Chen, Lung-Kai Mao, Ming-Da Cheng, Wen-Hsiung Lu
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Publication number: 20240097627Abstract: A class D amplifier is provided, including: a first comparator, configured to generate a first comparison result based on a positive end input signal and a triangular wave; a second comparator, configured to generate a second comparison result based on a negative end input signal and the triangular wave; an exclusive OR gate, configured to generate a first control signal based on the first comparison result and the second comparison result; a first AND gate, configured to generate a positive end PMW output based on the first comparison result and the first control signal; and a second AND gate, configured to generate a negative end PMW output based on the second comparison result and the first control signal; and an output stage, configured to generate the positive end output signal and the negative end output signal correspondingly based on the positive end PMW output and the negative end PMW output.Type: ApplicationFiled: November 15, 2023Publication date: March 21, 2024Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.Inventors: Kai MAO, Long HUANG, Junjun ZHANG, Yuqing YANG
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Patent number: 11931826Abstract: A continuous welding method and device for a hybrid welding, a welded finished product and a train body. The method comprises: performing hybrid welding on a groove of a welding piece by coupling a laser and a variable polarity arc; wherein the defocusing distance of the laser is not less than a Rayleigh length of the laser. According to the method of the present disclosure, the power density of the laser on the surface of the welding piece is effectively reduced and the height-width-ratio of the weld seam is decreased, the diameter of the welding melted pore is increased, the voids caused by the collapse of the small pore in the welding melted pore can be effectively reduced, thereby solving the problem that the weld porosity is difficult to escape in the prior art, and reducing the generation of the pores, effectively improving welding stability and reliability, and improving the mechanical properties of the weld seams.Type: GrantFiled: September 9, 2019Date of Patent: March 19, 2024Assignee: CRRC QINGDAO SIFANG CO., LTD.Inventors: Xiaohui Han, Zhendong Mao, Yuexin Gao, Kai Zheng, Gangqing Li
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Publication number: 20240073893Abstract: An outer loop initial value adjustment method, a device, and a readable storage medium are disclosed. The method may include: acquiring feature information of a plurality of User Equipment (UEs) scheduled by a cell; performing raster division on the feature information of the plurality of UEs to obtain a plurality of rasters; determining an outer loop corresponding to each of the rasters, where an outer loop value of each raster is within a target Block Error Rate (BLER) range; determining a target raster corresponding to a target UE according to the feature information of the target UE, where the target UE is one of the plurality of UEs scheduled by the cell; and determining the outer loop value corresponding to the target raster as an initial outer loop value of the target UE.Type: ApplicationFiled: June 15, 2022Publication date: February 29, 2024Inventors: Ke SHI, Qiaoyan LIU, Kai MAO, Jianguo LI, Zepeng MA
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Patent number: 11901266Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a chip structure including a substrate and a wiring structure over a first surface of the substrate. The method includes removing a first portion of the wiring structure adjacent to the hole to widen a second portion of the hole in the wiring structure. The second portion has a first width increasing in a first direction away from the substrate. The method includes forming a first seed layer over the wiring structure and in the hole. The method includes thinning the substrate from a second surface of the substrate until the first seed layer in the hole is exposed. The method includes forming a second seed layer over the second surface of the substrate and the first seed layer in the hole.Type: GrantFiled: August 30, 2021Date of Patent: February 13, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Li Yang, Wen-Hsiung Lu, Lung-Kai Mao, Fu-Wei Liu, Mirng-Ji Lii
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Patent number: 11894241Abstract: A method includes forming a first package component, which formation process includes forming a first plurality of openings in a first dielectric layer, depositing a first metallic material into the first plurality of openings, performing a planarization process on the first metallic material and the first dielectric layer to form a plurality of metal pads in the first dielectric layer, and selectively depositing a second metallic material on the plurality of metal pads to form a plurality of bond pads. The first plurality of bond pads comprise the plurality of metal pads and corresponding parts of the second metallic material. The first package component is bonded to a second package component.Type: GrantFiled: April 1, 2021Date of Patent: February 6, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Mirng-Ji Lii, Chen-Shien Chen, Lung-Kai Mao, Ming-Da Cheng, Wen-Hsiung Lu
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Publication number: 20240017988Abstract: A method includes bonding a supporting substrate to a semiconductor substrate of a wafer. A bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate. A first etching process is performed to etch the supporting substrate and to form an opening, which penetrates through the supporting substrate and stops on the bonding layer. The opening has substantially straight edges. The bonding layer is then etched. A second etching process is performed to extend the opening down into the semiconductor substrate. A bottom portion of the opening is curved.Type: ApplicationFiled: August 6, 2023Publication date: January 18, 2024Inventors: Jhao-Yi Wang, Chin-Yu Ku, Wen-Hsiung Lu, Lung-Kai Mao, Ming-Da Cheng
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Publication number: 20240015446Abstract: A MEMS structure is provided. The MEMS structure includes a substrate and a backplate, the substrate has an opening portion, and the backplate is disposed on one side of the substrate and has acoustic holes. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate, and the diaphragm extends across the opening portion of the substrate and includes outer ventilation holes and inner ventilation holes arranged in a concentric manner. The outer ventilation holes and the inner ventilation holes are relatively arranged in a ring shape and surround the center of the diaphragm. The MEMS structure further includes a pillar disposed between the backplate and the diaphragm. The pillar prevents the diaphragm from being electrically connected to the backplate.Type: ApplicationFiled: October 28, 2022Publication date: January 11, 2024Inventors: Wen-Shan LIN, Chun-Kai MAO, Chih-Yuan CHEN, Jien-Ming CHEN, Feng-Chia HSU, Nai-Hao KUO
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Publication number: 20230422220Abstract: Provided are a method and an apparatus for adjusting an inner loop value, The method includes: repeatedly executing the following steps, wherein a history inner loop adjustment factor of each time-domain scheduling unit in a radio frame is initialized to be an initial inner loop adjustment factor of each time-domain scheduling unit: determining a block error rate corresponding to each time-domain scheduling unit according to ACK/NACK information corresponding to each time-domain scheduling unit, wherein the radio frame comprises N time-domain scheduling units, N being a positive integer; determining a current inner loop adjustment factor of each time-domain scheduling unit according to the block error rate corresponding to each time-domain scheduling unit and the history inner loop adjustment factor of each time-domain scheduling unit; and adjusting an inner loop value corresponding to each time-domain scheduling unit according to the current inner loop adjustment factor of each time-domain scheduling unit.Type: ApplicationFiled: December 9, 2021Publication date: December 28, 2023Inventors: Jianguo LI, Qiaoyan LIU, Kai MAO, Wangwang JI
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Patent number: 11854835Abstract: A method includes forming a first package component, which formation process includes forming a first plurality of openings in a first dielectric layer, depositing a first metallic material into the first plurality of openings, performing a planarization process on the first metallic material and the first dielectric layer to form a plurality of metal pads in the first dielectric layer, and selectively depositing a second metallic material on the plurality of metal pads to form a plurality of bond pads. The first plurality of bond pads comprise the plurality of metal pads and corresponding parts of the second metallic material. The first package component is bonded to a second package component.Type: GrantFiled: August 10, 2022Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Mirng-Ji Lii, Chen-Shien Chen, Lung-Kai Mao, Ming-Da Cheng, Wen-Hsiung Lu
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Publication number: 20230386098Abstract: A three-dimensional (3D) spectrum situation completion method and device based on a generative adversarial network includes performing graying and coloring preprocessing based on incomplete 3D spectrum situations from historical or empirical spectrum data obtained by a UAV through sampling a target region, obtaining three-channel incomplete 3D spectrum situation maps displayed in colors, forming a training set based on the incomplete 3D spectrum situation maps; training the generative adversarial network based on the training set and obtaining a trained generator network in the generative adversarial network, performing graying and coloring preprocessing based on a measured incomplete 3D spectrum situation obtained by the UAV through sampling a specified measurement region, obtaining a three-channel measured incomplete 3D spectrum situation map displayed in colors, and using the measured incomplete 3D spectrum situation map as input data to the generator network to obtain a three-channel measured complete 3DType: ApplicationFiled: January 25, 2022Publication date: November 30, 2023Applicant: Nanjing University of Aeronautics and AstronauticsInventors: Yang HUANG, Qiuming ZHU, Tianyu HU, Qihui WU, Zhiren GONG, Xuan WU, Weizhi ZHONG, Kai MAO, Xiaofei ZHANG, Yiwei LU
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Publication number: 20230352342Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.Type: ApplicationFiled: June 20, 2023Publication date: November 2, 2023Inventors: Ming-Da Cheng, Wen-Hsiung Lu, Chin Wei Kang, Yung-Han Chuang, Lung-Kai Mao, Yung-Sheng Lin
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Publication number: 20230339742Abstract: A MEMS structure is provided. The MEMS structure includes a substrate having an opening portion and a backplate disposed on one side of the substrate and having acoustic holes. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate and extending across the opening portion of the substrate. The diaphragm includes ventilation holes, and an air gap is formed between the diaphragm and the backplate. The MEMS structure further includes a coverage structure disposed on the sidewall of at least one ventilation hole.Type: ApplicationFiled: August 3, 2022Publication date: October 26, 2023Inventors: Jien-Ming CHEN, Wen-Shan LIN, Chun-Kai MAO, Feng-Chia HSU, Chih-Yuan CHEN, Nai-Hao KUO
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Publication number: 20230337006Abstract: The present application relates to the technical field of communications, and in particular to a method for scheduling spectrum resources and a storage medium. The method for scheduling spectrum resources includes: obtaining a grid according to dividing a cell in a network, each grid corresponding to one resource block or one resource block group; obtaining offline feature data; performing an interference mark on the grid according to the offline feature data, to obtain a mark model; and scheduling spectrum resources according to the mark model.Type: ApplicationFiled: June 21, 2023Publication date: October 19, 2023Inventors: Wangwang JI, Qiaoyan LIU, Kai MAO, Jianguo LI, Miao FAN
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Patent number: 11783713Abstract: A method and a device for measuring a four-dimensional (4D) radiation pattern of an outdoor antenna based on an unmanned aerial vehicle (UAV) are provided. The device includes a measurement path planning unit, a UAV platform unit, a radiation signal acquisition unit, a data command processing unit, and a ground data processing unit. The measurement path planning unit, the radiation signal acquisition unit, and the data command processing unit each are suspended from the UAV platform unit by using a pod. The present disclosure applies to the radiation pattern measurement of an outdoor antenna.Type: GrantFiled: May 6, 2021Date of Patent: October 10, 2023Assignee: Nanjing University of Aeronautics and AstronauticsInventors: Qihui Wu, Qiuming Zhu, Tianxu Lan, Yang Huang, Jie Li, Xiaofu Du, Weizhi Zhong, Lu Han, Yunpeng Bai, Junjie Zhang, Kai Mao