Patents by Inventor Kam Chuen Yung

Kam Chuen Yung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9099376
    Abstract: Reduced-graphene oxide circuits are directly patterned on glass substrate using an industrially available excimer laser system. A threshold of laser energy density is observed, which provide a clear differentiation on whether the graphene oxide is reduced. The highest conductivity measured is 7.142×103 S/m. The reduced-graphene oxide displays a transmittance greater than 80% across the entire range from 450 to 800 nm. The outstanding electrical, optical, and morphological properties have enabled reduced-graphene oxide to display promising applications, and this nano-processing method makes reduced-graphene oxide even more attractive when used as a transparent electrode for touch screens or in other applications.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: August 4, 2015
    Assignee: NANO AND ADVANCED MATERIALS INSTITUTE LIMITED
    Inventors: Kam-Chuen Yung, Hai-Ming Liem, Hang-Shan Choy
  • Publication number: 20100028689
    Abstract: A thermal conductive dielectric coated metal-plate includes a metal carrier, and a partially cured dielectric layer coated to the metal carrier. The dielectric layer includes an epoxy resin, a filler, and a coupling agent.
    Type: Application
    Filed: July 31, 2008
    Publication date: February 4, 2010
    Inventors: Kam-Chuen Yung, Tai-Man Yue
  • Patent number: 6919011
    Abstract: A method of electroplating an object includes providing a electroplating bath solution with one or more anodes therein, disposing an object to be electroplated in the bath, and passing a complex current waveform between the anode nodes and the object. The waveform is a cyclic alternating type having two portions, a positive triangular shaped portion including one or more spikes and a negative portion. The method further includes vibrating the object and/or agitating the bath solution.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: July 19, 2005
    Assignee: The Hong Kong Polytechnic University
    Inventors: Kang Cheung Chan, Kam Chuen Yung, Tai Men Yue
  • Patent number: 6809289
    Abstract: A circuit board comprising a dielectric material provided with a conductive layer is drilled with laser operated at an energy density below the ablation threshold of the conductive layer. The method of drilling includes providing on the conductive layer an ablation layer having an ablation threshold near or below that laser energy density, directing the laser at a target area of the ablation layer to ablate portions of the conductive and dielectric layers in the target area, and removing any remaining ablation layer from the conductive layer.
    Type: Grant
    Filed: March 5, 2003
    Date of Patent: October 26, 2004
    Assignee: The Hong Kong Polytechnic University
    Inventors: Kam-Chuen Yung, Tai-Man Yue, Xiang-Yi Fang
  • Publication number: 20040173589
    Abstract: A circuit board comprising a dielectric material provided with a conductive layer is drilled with laser operated at an energy density below the ablation threshold of the conductive layer. The method of drilling includes providing on the conductive layer an ablation layer having an ablation threshold near or below that laser energy density, directing the laser at a target area of the ablation layer to ablate portions of the conductive and dielectric layers in the target area, and removing any remaining ablation layer from the conductive layer.
    Type: Application
    Filed: March 5, 2003
    Publication date: September 9, 2004
    Inventors: Kam-Chuen Yung, Tai-Man Yue, Xiang-Yi Fang
  • Publication number: 20040084810
    Abstract: A three-step method in which a printed circuit board (PCB) is laser drilled to form a via, and the internal walls of the via are plated with conductive material to connect conductive layers at the upper and lower ends of the via. In the first step a first laser removes a first portion of the board. In the second step a second laser removes a further portion of the board to form a via. In the third step a third laser ablates conductive material at the bottom of the via to plate the inner walls of the via.
    Type: Application
    Filed: November 1, 2002
    Publication date: May 6, 2004
    Inventors: Winco Kam-Chuen Yung, Esther Sau-Wai Leung, Mark D. Owen