Patents by Inventor Kamel Ounadjela
Kamel Ounadjela has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120067540Abstract: The present invention relates to an apparatus and method for purifying materials using a rapid directional solidification. Devices and methods shown provide control over a temperature gradient and cooling rate during directional solidification, which results in a material of higher purity. The apparatus and methods of the present invention can be used to make silicon material for use in solar applications such as solar cells.Type: ApplicationFiled: September 16, 2011Publication date: March 22, 2012Applicant: Calisolar, Inc.Inventors: Abdallah Nouri, Kamel Ounadjela
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Publication number: 20110309478Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered.Type: ApplicationFiled: August 26, 2011Publication date: December 22, 2011Applicant: Calisolar, Inc.Inventors: Fritz Kirscht, Kamel Ounadjela, Jean Patrice Rakotoniana, Dieter Linke
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Publication number: 20110211995Abstract: Techniques for the formation of a silicon ingot using a low-grade silicon feedstock include forming within a crucible device a molten silicon from a low-grade silicon feedstock and performing a directional solidification of the molten silicon to form a silicon ingot within the crucible device. The directional solidification forms a generally solidified quantity of silicon and a generally molten quantity of silicon. The method and system include removing from the crucible device at least a portion of the generally molten quantity of silicon while retaining within the crucible device the generally solidified quantity of silicon. Controlling the directional solidification of the generally solidified quantity of silicon, while removing the more contaminated molten silicon, results in a silicon ingot possessing a generally higher grade of silicon than the low-grade silicon feedstock.Type: ApplicationFiled: February 25, 2011Publication date: September 1, 2011Applicant: Calisolar, Inc.Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
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Patent number: 8008107Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered.Type: GrantFiled: December 30, 2006Date of Patent: August 30, 2011Assignee: Calisolar, Inc.Inventors: Fritz Kirscht, Kamel Ounadjela, Jean Patrice Rakotoniana, Dieter Linke
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Patent number: 7955433Abstract: Techniques for the formation of a silicon ingot using a low-grade silicon feedstock include forming within a crucible device a molten silicon from a low-grade silicon feedstock and performing a directional solidification of the molten silicon to form a silicon ingot within the crucible device. The directional solidification forms a generally solidified quantity of silicon and a generally molten quantity of silicon. The method and system include removing from the crucible device at least a portion of the generally molten quantity of silicon while retaining within the crucible device the generally solidified quantity of silicon. Controlling the directional solidification of the generally solidified quantity of silicon, while removing the more contaminated molten silicon, results in a silicon ingot possessing a generally higher grade of silicon than the low-grade silicon feedstock.Type: GrantFiled: July 26, 2007Date of Patent: June 7, 2011Assignee: Calisolar, Inc.Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
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Publication number: 20110126758Abstract: Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. A common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, including increased material strength and improved electrical properties. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells.Type: ApplicationFiled: November 24, 2010Publication date: June 2, 2011Applicant: Calisolar, Inc.Inventors: Fritz G. Kirscht, Matthias Heuer, Martin Kaes, Kamel Ounadjela
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Patent number: 7887633Abstract: Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. Common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, mainly increased material strength. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells. A silicon material with a germanium concentration in the range (50-200) ppmw demonstrates an increased material strength, where best practical ranges depend on the material quality generated.Type: GrantFiled: June 16, 2008Date of Patent: February 15, 2011Assignee: Calisolar, Inc.Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Anis Jouini, Dieter Linke, Martin Kaes, Jean Patrice Rakotoniaina, Kamel Ounadjela
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Publication number: 20100327890Abstract: A quality control process for determining the concentrations of boron and phosphorous in a UMG-Si feedstock batch is provided. A silicon test ingot is formed by the directional solidification of molten UMG-Si from a UMG-Si feedstock batch. The resistivity of the silicon test ingot is measured from top to bottom. Then, the resistivity profile of the silicon test ingot is mapped. From the resistivity profile of the silicon test ingot, the concentrations of boron and phosphorous of the UMG-Si silicon feedstock batch are calculated. Additionally, multiple test ingots may be grown simultaneously, with each test ingot corresponding to a UMG-Si feedstock batch, in a multi-crucible crystal grower.Type: ApplicationFiled: April 29, 2010Publication date: December 30, 2010Applicant: CaliSolar, Inc.Inventors: Kamel Ounadjela, Marcin Walerysiak, Anis Jouini, Matthias Heuer, Omar Sidelkheir, Alain Blosse, Fritz Kirscht
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Publication number: 20100310445Abstract: A process control method for UMG-Si purification by performing a directional solidification of molten UMG-Si to form a silicon ingot is described. The ingot is divided into bricks and the resistivity profile of each silicon brick is mapped. A crop line for removing the impurities concentrated and captured in the ingot during the directional solidification is calculated based on the resistivity map. The concentrated impurities are then removed by cropping each brick along that brick's calculated crop line.Type: ApplicationFiled: February 10, 2010Publication date: December 9, 2010Applicant: CaliSolar, Inc.Inventors: Kamel Ounadjela, Marcin Walerysiak, Anis Jouini, Matthias Heuer, Omar Sidelkheir, Alain Blosse, Fritz Kirscht
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Publication number: 20100275984Abstract: A simplified manufacturing process and the resultant bifacial solar cell (BSC) are provided, the simplified manufacturing process reducing manufacturing costs. The BSC includes an active region located on the front surface of the substrate, formed for example by a phosphorous diffusion step. The back surface includes a doped region, the doped region having the same conductivity as the substrate but with a higher doping level. Contact grids are formed, for example by screen printing. Front junction isolation is accomplished using a laser scribe.Type: ApplicationFiled: June 15, 2009Publication date: November 4, 2010Applicant: Calisolar, Inc.Inventors: Martin Kaes, Peter Borden, Kamel Ounadjela, Andreas Kraenzl, Alain Blosse, Fritz G. Kirscht
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Publication number: 20100275983Abstract: A simplified manufacturing process and the resultant bifacial solar cell (BSC) are provided, the simplified manufacturing process reducing manufacturing costs. The BSC includes an active region located on the front surface of the substrate, formed for example by a phosphorous diffusion step. After removing the PSG, assuming phosphorous diffusion, and isolating the front junction, dielectric layers are deposited on the front and back surfaces. Contact grids are formed, for example by screen printing. Prior to depositing the back surface dielectric, a metal grid may be applied to the back surface, the back surface contact grid registered to, and alloyed to, the metal grid during contact firing.Type: ApplicationFiled: June 15, 2009Publication date: November 4, 2010Applicant: Calisolar, Inc.Inventors: Martin Kaes, Peter Borden, Kamel Ounadjela, Andreas Kraenzl, Alain Blosse, Fritz G. Kirscht
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Publication number: 20100275995Abstract: A simplified manufacturing process and the resultant bifacial solar cell (BSC) are provided, the simplified manufacturing process reducing manufacturing costs. The BSC includes a back surface contact grid and an overlaid blanket metal reflector. A doped amorphous silicon layer is interposed between the contact grid and the blanket layer.Type: ApplicationFiled: June 15, 2009Publication date: November 4, 2010Applicant: Calisolar, Inc.Inventors: Martin Kaes, Peter Borden, Kamel Ounadjela, Andreas Kraenzl, Alain Blosse, Fritz G. Kirscht
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Publication number: 20100258768Abstract: Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides semiconductor predominantly of a single type (p-type or n-type) for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of boron, phosphorus, aluminum and/or gallium. The process further melts the silicon feedstock with the boron, phosphorus, aluminum and/or gallium to form a molten silicon solution from which to perform directional solidification and maintains the homogeneity of the resistivity of the silicon throughout the ingot. A balanced amount of phosphorus can be optionally added to the aluminum and/or gallium. Resistivity may also be measured repeatedly during ingot formation, and additional dopant may be added in response, either repeatedly or continuously.Type: ApplicationFiled: November 13, 2009Publication date: October 14, 2010Applicant: CALISOLAR, INC.Inventors: Fritz Kirscht, Marcin Walerysiak, Matthias Heuer, Anis Jouini, Kamel Ounadjela
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Patent number: 7651566Abstract: Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides a predominantly p-type semiconductor for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of aluminum or/and gallium. The process further melts the silicon feedstock together with a predetermined amount of aluminum or/and gallium to form a molten silicon solution from which to perform directional solidification and, by virtue of adding aluminum or/and gallium, maintains the homogeneity the resistivity of the silicon ingot throughout the silicon ingot. In the case of feedstock silicon leading to low resistivity in respective ingots, typically below 0.4 ?cm, a balanced amount of phosphorus can be optionally added to aluminum or/and gallium.Type: GrantFiled: June 27, 2007Date of Patent: January 26, 2010Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
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Publication number: 20090308455Abstract: Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. Common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, mainly increased material strength. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells. A silicon material with a germanium concentration in the range (50-200) ppmw demonstrates an increased material strength, where best practical ranges depend on the material quality generated.Type: ApplicationFiled: June 16, 2008Publication date: December 17, 2009Applicant: CALISOLAR, INC.Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Anis Jouini, Dieter Linke, Martin Kaes, Jean Patrice Rakotoniaina, Kamel Ounadjela
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SOLAR CELL AND FABRICATION METHOD USING CRYSTALLINE SILICON BASED ON LOWER GRADE FEEDSTOCK MATERIALS
Publication number: 20090223549Abstract: Formation of a solar cell device from upgraded metallurgical grade silicon which has received at least one defect engineering process and including a low contact resistance electrical path. An anti-reflective coating is formed on an emitter layer and back contacts are formed on a back surface of the bulk silicon substrate. This photovoltaic device may be fired to form a back surface field at a temperature sufficiently low to avoid reversal of previous defect engineering processes. The process further forms openings in the anti-reflective coating and a low contact resistance metal layer, such as nickel layer, over the openings in the anti-reflective coating. The process may anneal the low contact resistance metal layer to form n-doped portion and complete an electrically conduct path to the n-doped layer. This low temperature metallization (e.g., <700° C.) supports the use of UMG silicon for the solar device formation without the risk of reversing earlier defect engineering processes.Type: ApplicationFiled: March 10, 2008Publication date: September 10, 2009Applicant: CaliSolar, Inc.Inventors: Kamel Ounadjela, Jean Patrice Rakotoniaina, Martin Kaes, Dirk Zickermann, Alain Blosse, Abdellatif Zerga, Matthias Heuer, Fritz Kirscht -
Publication number: 20090026423Abstract: Techniques for controlling resistivity in the formation of a silicon ingot from compensated feedstock silicon material prepares a compensated, upgraded metallurgical silicon feedstock for being melted to form a silicon melt. The compensated, upgraded metallurgical silicon feedstock provides a predominantly p-type semiconductor for which the process assesses the concentrations of boron and phosphorus and adds a predetermined amount of aluminum or/and gallium. The process further melts the silicon feedstock together with a predetermined amount of aluminum or/and gallium to form a molten silicon solution from which to perform directional solidification and, by virtue of adding aluminum or/and gallium, maintains the homogeneity the resistivity of the silicon ingot throughout the silicon ingot. In the case of feedstock silicon leading to low resistivity in respective ingots, typically below 0.4? cm, a balanced amount of phosphorus can be optionally added to aluminum or/and gallium.Type: ApplicationFiled: June 27, 2007Publication date: January 29, 2009Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
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Publication number: 20090028773Abstract: Techniques for the formation of a silicon ingot using a low-grade silicon feedstock include forming within a crucible device a molten silicon from a low-grade silicon feedstock and performing a directional solidification of the molten silicon to form a silicon ingot within the crucible device. The directional solidification forms a generally solidified quantity of silicon and a generally molten quantity of silicon. The method and system include removing from the crucible device at least a portion of the generally molten quantity of silicon while retaining within the crucible device the generally solidified quantity of silicon. Controlling the directional solidification of the generally solidified quantity of silicon, while removing the more contaminated molten silicon, results in a silicon ingot possessing a generally higher grade of silicon than the low-grade silicon feedstock.Type: ApplicationFiled: July 26, 2007Publication date: January 29, 2009Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Dieter Linke, Jean Patrice Rakotoniana, Kamel Ounadjela
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Publication number: 20080257254Abstract: Techniques for the formation of a large grain, multi-crystalline semiconductor ingot and include forming a silicon melt in a crucible, the crucible capable of locally controlling thermal gradients within the silicon melt. The local control of thermal gradients preferentially forms silicon crystals in predetermined regions within the silicon melt by locally reducing temperatures is the predetermined regions. The method and system control the rate at which the silicon crystals form using local control of thermal gradients for inducing the silicon crystals to obtain preferentially maximal sizes and, thereby, reducing the number of grains for a given volume. The process continues the thermal gradient control and the rate control step to form a multicrystalline silicon ingot having reduced numbers of grains for a given volume of the silicon ingot.Type: ApplicationFiled: April 17, 2007Publication date: October 23, 2008Inventors: Dieter Linke, Matthias Heuer, Fritz Kirscht, Jean Patrice Rakotoniana, Kamel Ounadjela
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Publication number: 20080197454Abstract: Techniques are here disclosed for a solar cell pre-processing. The method and system remove impurities from low-grade crystalline semiconductor wafers and include forming a low-grade semiconductor wafer having a substrate having high impurity content. The process and system damage at least one surface of the semiconductor wafer either in the semiconductor wafer forming step or in a separate step to form a region on the surface that includes a plurality of gettering centers. The gettering centers attract impurities from the substrate during subsequent processing. The subsequent processes include diffusing impurities from the substrate using a phosphorus gettering process that includes impregnating the surface with a phosphorus material for facilitating the formation of impurity clusters associated with the gettering centers.Type: ApplicationFiled: February 16, 2007Publication date: August 21, 2008Applicant: CaliSolar, Inc.Inventors: Jean Patrice Rakotoniana, Matthias Heuer, Fritz Kirscht, Dieter Linke, Kamel Ounadjela