Patents by Inventor Kanan Puntambekar

Kanan Puntambekar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9452630
    Abstract: A method is provided for controlling printed ink horizontal. cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: September 27, 2016
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa Stecker
  • Patent number: 9198299
    Abstract: A method is provided for repairing defects in a contact printed circuit. The method provides a substrate with a contact printed circuit formed on a substrate top surface. After detecting a discontinuity in a printed circuit feature, a bias voltage is applied to at least one of a first region of the printed circuit feature or a second region of the printed circuit feature. The bias voltage may also be applied to both the first and second regions. An electric field is formed between the bias voltage and an ink delivery nozzle having a voltage potential less than the bias voltage. Conductive ink is attracted into the electric field from the ink delivery nozzle. Conductive ink is printed on the discontinuity, forming a conductive printed bridge. Typically, the ink delivery nozzle is an electrohydrodynamic (EHD) printing nozzle.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: November 24, 2015
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa Stecker
  • Patent number: 9093475
    Abstract: A method is provided for forming a printed top gate thin film transistor (TFT) with a short channel length. The method provides a substrate with a low surface energy top surface. A metal ink line is continuously printed across a region of the substrate top surface, and in response to the surface tension of the printed metal ink, discrete spherical ink caps are formed in the region. Then, the surface energy of the substrate top surface in the region is increased. A source metal ink line is printed overlying a source spherical ink cap contact, and a drain metal ink line, parallel to the source metal ink line, is printed overlying a drain spherical ink cap contact. After depositing a semiconductor film, a channel is formed in the semiconductor film between the source and drain spherical ink cap contacts having a channel length equal to the first distance.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: July 28, 2015
    Assignee: Sharp Laboratories of America, Inc
    Inventors: Kurt Ulmer, Kanan Puntambekar
  • Publication number: 20140290513
    Abstract: A method is provided for controlling printed ink horizontal. cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 2, 2014
    Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa Stecker
  • Patent number: 8803139
    Abstract: A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: August 12, 2014
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Kanan Puntambekar, Lisa Stecker, Kurt Ulmer
  • Patent number: 8796083
    Abstract: A method is provided for controlling the channel length in a thin-film transistor (TFT). The method forms a printed ink first source/drain (S/D) structure overlying a substrate. A fluoropolymer mask is deposited to cover the first S/D structure. A boundary region is formed between the edge of the fluoropolymer mask and the edge of the printed ink first S/D structure, having a width. Then, a primary ink is printed at least partially overlying the boundary region, forming a printed ink second S/D structure, having an edge adjacent to the fluoropolymer mask edge. After removing the fluoropolymer mask, the printed ink first S/D structure edge is left separated from the printed ink second S/D structure edge by a space equal to the boundary region width. A semiconductor channel is formed partially overlying the first and second S/D structures, having a channel length equal to the boundary region width.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: August 5, 2014
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Kurt Ulmer, Kanan Puntambekar
  • Publication number: 20140183634
    Abstract: A method is provided for forming a printed top gate thin film transistor (TFT) with a short channel length. The method provides a substrate with a low surface energy top surface. A metal ink line is continuously printed across a region of the substrate top surface, and in response to the surface tension of the printed metal ink, discrete spherical ink caps are formed in the region. Then, the surface energy of the substrate top surface in the region is increased. A source metal ink line is printed overlying a source spherical ink cap contact, and a drain metal ink line, parallel to the source metal ink line, is printed overlying a drain spherical ink cap contact. After depositing a semiconductor film, a channel is formed in the semiconductor film between the source and drain spherical ink cap contacts having a channel length equal to the first distance.
    Type: Application
    Filed: January 3, 2013
    Publication date: July 3, 2014
    Inventors: Kurt Ulmer, Kanan Puntambekar
  • Publication number: 20140183457
    Abstract: A method is provided for preparing an interface surface for the deposition of an organic semiconductor material, in the fabrication of an organic thin film transistor (OTFT). A substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode. Then, source (S) and drain (D) electrodes are formed overlying the gate dielectric, exposing a gate dielectric channel interface region between the S/D electrodes. Subsequent to exposing the OTFT to a H2 or N2 plasma, a self-assembled organic monolayer is formed overlying the S/D electrodes. Finally, an active organic semiconductor layer is formed over the S/D electrodes and gate dielectric channel interface. The OTFT may be exposed to plasma either before or after the formation of the S/D electrodes.
    Type: Application
    Filed: January 3, 2013
    Publication date: July 3, 2014
    Inventors: Lisa H. STECKER, Kanan PUNTAMBEKAR, Kurt ULMER
  • Patent number: 8765224
    Abstract: A method is provided for controlling printed ink horizontal cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: July 1, 2014
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa H. Stecker
  • Publication number: 20140158399
    Abstract: A method is provided for repairing defects in a contact printed circuit. The method provides a substrate with a contact printed circuit formed on a substrate top surface. After detecting a discontinuity in a printed circuit feature, a bias voltage is applying to at least one of a first region of the printed circuit feature or a second region of the printed circuit feature. The bias voltage may also be applied to both the first and second regions. An electric field is formed between the bias voltage and an ink delivery nozzle having a voltage potential less than the bias voltage. Conductive ink is attracted into the electric field from the ink delivery nozzle. Conductive is printed ink on the discontinuity, forming a conductive printed bridge. Typically, the ink delivery nozzle is an electrohydrodynamic (EHD) printing nozzle.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 12, 2014
    Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa H. Stecker
  • Patent number: 8691621
    Abstract: A method is provided for preparing a printed metal surface for the deposition of an organic semiconductor material. The method provides a substrate with a top surface, and a metal layer is formed overlying the substrate top surface. Simultaneous with a thermal treatment of the metal layer, the metal layer is exposed to a gaseous atmosphere with thiol molecules. In response to exposing the metal layer to the gaseous atmosphere with thiol molecules, the work function of the metal layer is increased. Subsequent to the thermal treatment, an organic semiconductor material is deposited overlying the metal layer. In one aspect, the metal layer is exposed to the gaseous atmosphere with thiol molecules by evaporating a liquid containing thiol molecules in an ambient air atmosphere. Alternatively, a delivery gas is passed through a liquid containing thiol molecules. An organic thin-film transistor (OTFT) and OTFT fabrication process are also provided.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: April 8, 2014
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Kurt Ulmer, Kanan Puntambekar
  • Publication number: 20140054560
    Abstract: A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.
    Type: Application
    Filed: February 15, 2013
    Publication date: February 27, 2014
    Inventors: Kanan Puntambekar, Lisa Stecker, Kurt Ulmer
  • Publication number: 20130307073
    Abstract: A method is provided for controlling the channel length in a thin-film transistor (TFT). The method forms a printed ink first source/drain (S/D) structure overlying a substrate. A fluoropolymer mask is deposited to cover the first S/D structure. A boundary region is formed between the edge of the fluoropolymer mask and the edge of the printed ink first S/D structure, having a width. Then, a primary ink is printed at least partially overlying the boundary region, forming a printed ink second S/D structure, having an edge adjacent to the fluoropolymer mask edge. After removing the fluoropolymer mask, the printed ink first S/D structure edge is left separated from the printed ink second S/D structure edge by a space equal to the boundary region width. A semiconductor channel is formed partially overlying the first and second S/D structures, having a channel length equal to the boundary region width.
    Type: Application
    Filed: May 15, 2012
    Publication date: November 21, 2013
    Inventors: Kurt Ulmer, Kanan Puntambekar
  • Publication number: 20130260536
    Abstract: A method is provided for controlling printed ink horizontal cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 3, 2013
    Inventors: Kurt ULMER, Kanan PUNTAMBEKAR, Lisa H. STECKER
  • Patent number: 8513720
    Abstract: A top gate and bottom gate thin film transistor (TFT) are provided with an associated fabrication method. The TFT is fabricated from a substrate, and an active metal oxide semiconductor (MOS) layer overlying the substrate. Source/drain (S/D) regions are formed in contact with the active MOS layer. A channel region is interposed between the S/D regions. The TFT includes a gate electrode, and a gate dielectric interposed between the channel region and the gate electrode. The active MOS layer may be ZnOx, InOx, GaOx, SnOx, or combinations of the above-mentioned materials. The active MOS layer also includes a primary dopant such as H, K, Sc, La, Mo, Bi, Ce, Pr, Nd, Sm, Dy, or combinations of the above-mentioned dopants. The active MOS layer may also include a secondary dopant.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: August 20, 2013
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Gregory S. Herman, Jer-shen Maa, Kanan Puntambekar, Apostolos T. Voutsas
  • Patent number: 8399290
    Abstract: A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: March 19, 2013
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Kanan Puntambekar, Lisa H. Stecker, Kurt Ulmer
  • Patent number: 8367459
    Abstract: A method is provided for preparing an interface surface for the deposition of an organic semiconductor material, in the fabrication of an organic thin film transistor (OTFT). A substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode. Then, source (S) and drain (D) electrodes are formed overlying the gate dielectric, exposing a gate dielectric channel interface region between the S/D electrodes. Subsequent to exposing the OTFT to a H2 or N2 plasma, a self-assembled organic monolayer is formed overlying the S/D electrodes. Finally, an active organic semiconductor layer is formed over the S/D electrodes and gate dielectric channel interface. The OTFT may be exposed to plasma either before or after the formation of the S/D electrodes.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: February 5, 2013
    Assignee: Sharp Laboratories Of America, Inc.
    Inventors: Lisa H. Stecker, Kanan Puntambekar, Kurt Ulmer
  • Publication number: 20120181512
    Abstract: A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.
    Type: Application
    Filed: January 19, 2011
    Publication date: July 19, 2012
    Inventors: Kanan Puntambekar, Lisa H. Stecker, Kurt Ulmer
  • Publication number: 20120146002
    Abstract: A method is provided for preparing an interface surface for the deposition of an organic semiconductor material, in the fabrication of an organic thin film transistor (OTFT). A substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode. Then, source (S) and drain (D) electrodes are formed overlying the gate dielectric, exposing a gate dielectric channel interface region between the S/D electrodes. Subsequent to exposing the OTFT to a H2 or N2 plasma, a self-assembled organic monolayer is formed overlying the S/D electrodes. Finally, an active organic semiconductor layer is formed over the S/D electrodes and gate dielectric channel interface. The OTFT may be exposed to plasma either before or after the formation of the S/D electrodes.
    Type: Application
    Filed: December 14, 2010
    Publication date: June 14, 2012
    Inventors: Lisa H. Stecker, Kanan Puntambekar, Kurt Ulmer
  • Publication number: 20120012835
    Abstract: A top gate and bottom gate thin film transistor (TFT) are provided with an associated fabrication method. The TFT is fabricated from a substrate, and an active metal oxide semiconductor (MOS) layer overlying the substrate. Source/drain (S/D) regions are formed in contact with the active MOS layer. A channel region is interposed between the S/D regions. The TFT includes a gate electrode, and a gate dielectric interposed between the channel region and the gate electrode. The active MOS layer may be ZnOx, InOx, GaOx, SnOx, or combinations of the above-mentioned materials. The active MOS layer also includes a primary dopant such as H, K, Sc, La, Mo, Bi, Ce, Pr, Nd, Sm, Dy, or combinations of the above-mentioned dopants. The active MOS layer may also include a secondary dopant.
    Type: Application
    Filed: July 14, 2010
    Publication date: January 19, 2012
    Inventors: Gregory Herman, Jer-shen Maa, Kanan Puntambekar, Apostolos T. Voutsas