Patents by Inventor Kanan Puntambekar
Kanan Puntambekar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9452630Abstract: A method is provided for controlling printed ink horizontal. cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.Type: GrantFiled: June 16, 2014Date of Patent: September 27, 2016Assignee: Sharp Laboratories of America, Inc.Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa Stecker
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Patent number: 9198299Abstract: A method is provided for repairing defects in a contact printed circuit. The method provides a substrate with a contact printed circuit formed on a substrate top surface. After detecting a discontinuity in a printed circuit feature, a bias voltage is applied to at least one of a first region of the printed circuit feature or a second region of the printed circuit feature. The bias voltage may also be applied to both the first and second regions. An electric field is formed between the bias voltage and an ink delivery nozzle having a voltage potential less than the bias voltage. Conductive ink is attracted into the electric field from the ink delivery nozzle. Conductive ink is printed on the discontinuity, forming a conductive printed bridge. Typically, the ink delivery nozzle is an electrohydrodynamic (EHD) printing nozzle.Type: GrantFiled: December 11, 2012Date of Patent: November 24, 2015Assignee: Sharp Laboratories of America, Inc.Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa Stecker
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Patent number: 9093475Abstract: A method is provided for forming a printed top gate thin film transistor (TFT) with a short channel length. The method provides a substrate with a low surface energy top surface. A metal ink line is continuously printed across a region of the substrate top surface, and in response to the surface tension of the printed metal ink, discrete spherical ink caps are formed in the region. Then, the surface energy of the substrate top surface in the region is increased. A source metal ink line is printed overlying a source spherical ink cap contact, and a drain metal ink line, parallel to the source metal ink line, is printed overlying a drain spherical ink cap contact. After depositing a semiconductor film, a channel is formed in the semiconductor film between the source and drain spherical ink cap contacts having a channel length equal to the first distance.Type: GrantFiled: January 3, 2013Date of Patent: July 28, 2015Assignee: Sharp Laboratories of America, IncInventors: Kurt Ulmer, Kanan Puntambekar
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Publication number: 20140290513Abstract: A method is provided for controlling printed ink horizontal. cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.Type: ApplicationFiled: June 16, 2014Publication date: October 2, 2014Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa Stecker
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Patent number: 8803139Abstract: A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.Type: GrantFiled: February 15, 2013Date of Patent: August 12, 2014Assignee: Sharp Laboratories of America, Inc.Inventors: Kanan Puntambekar, Lisa Stecker, Kurt Ulmer
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Patent number: 8796083Abstract: A method is provided for controlling the channel length in a thin-film transistor (TFT). The method forms a printed ink first source/drain (S/D) structure overlying a substrate. A fluoropolymer mask is deposited to cover the first S/D structure. A boundary region is formed between the edge of the fluoropolymer mask and the edge of the printed ink first S/D structure, having a width. Then, a primary ink is printed at least partially overlying the boundary region, forming a printed ink second S/D structure, having an edge adjacent to the fluoropolymer mask edge. After removing the fluoropolymer mask, the printed ink first S/D structure edge is left separated from the printed ink second S/D structure edge by a space equal to the boundary region width. A semiconductor channel is formed partially overlying the first and second S/D structures, having a channel length equal to the boundary region width.Type: GrantFiled: May 15, 2012Date of Patent: August 5, 2014Assignee: Sharp Laboratories of America, Inc.Inventors: Kurt Ulmer, Kanan Puntambekar
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Publication number: 20140183634Abstract: A method is provided for forming a printed top gate thin film transistor (TFT) with a short channel length. The method provides a substrate with a low surface energy top surface. A metal ink line is continuously printed across a region of the substrate top surface, and in response to the surface tension of the printed metal ink, discrete spherical ink caps are formed in the region. Then, the surface energy of the substrate top surface in the region is increased. A source metal ink line is printed overlying a source spherical ink cap contact, and a drain metal ink line, parallel to the source metal ink line, is printed overlying a drain spherical ink cap contact. After depositing a semiconductor film, a channel is formed in the semiconductor film between the source and drain spherical ink cap contacts having a channel length equal to the first distance.Type: ApplicationFiled: January 3, 2013Publication date: July 3, 2014Inventors: Kurt Ulmer, Kanan Puntambekar
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Publication number: 20140183457Abstract: A method is provided for preparing an interface surface for the deposition of an organic semiconductor material, in the fabrication of an organic thin film transistor (OTFT). A substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode. Then, source (S) and drain (D) electrodes are formed overlying the gate dielectric, exposing a gate dielectric channel interface region between the S/D electrodes. Subsequent to exposing the OTFT to a H2 or N2 plasma, a self-assembled organic monolayer is formed overlying the S/D electrodes. Finally, an active organic semiconductor layer is formed over the S/D electrodes and gate dielectric channel interface. The OTFT may be exposed to plasma either before or after the formation of the S/D electrodes.Type: ApplicationFiled: January 3, 2013Publication date: July 3, 2014Inventors: Lisa H. STECKER, Kanan PUNTAMBEKAR, Kurt ULMER
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Patent number: 8765224Abstract: A method is provided for controlling printed ink horizontal cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.Type: GrantFiled: March 28, 2012Date of Patent: July 1, 2014Assignee: Sharp Laboratories of America, Inc.Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa H. Stecker
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Publication number: 20140158399Abstract: A method is provided for repairing defects in a contact printed circuit. The method provides a substrate with a contact printed circuit formed on a substrate top surface. After detecting a discontinuity in a printed circuit feature, a bias voltage is applying to at least one of a first region of the printed circuit feature or a second region of the printed circuit feature. The bias voltage may also be applied to both the first and second regions. An electric field is formed between the bias voltage and an ink delivery nozzle having a voltage potential less than the bias voltage. Conductive ink is attracted into the electric field from the ink delivery nozzle. Conductive is printed ink on the discontinuity, forming a conductive printed bridge. Typically, the ink delivery nozzle is an electrohydrodynamic (EHD) printing nozzle.Type: ApplicationFiled: December 11, 2012Publication date: June 12, 2014Inventors: Kurt Ulmer, Kanan Puntambekar, Lisa H. Stecker
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Patent number: 8691621Abstract: A method is provided for preparing a printed metal surface for the deposition of an organic semiconductor material. The method provides a substrate with a top surface, and a metal layer is formed overlying the substrate top surface. Simultaneous with a thermal treatment of the metal layer, the metal layer is exposed to a gaseous atmosphere with thiol molecules. In response to exposing the metal layer to the gaseous atmosphere with thiol molecules, the work function of the metal layer is increased. Subsequent to the thermal treatment, an organic semiconductor material is deposited overlying the metal layer. In one aspect, the metal layer is exposed to the gaseous atmosphere with thiol molecules by evaporating a liquid containing thiol molecules in an ambient air atmosphere. Alternatively, a delivery gas is passed through a liquid containing thiol molecules. An organic thin-film transistor (OTFT) and OTFT fabrication process are also provided.Type: GrantFiled: November 20, 2012Date of Patent: April 8, 2014Assignee: Sharp Laboratories of America, Inc.Inventors: Kurt Ulmer, Kanan Puntambekar
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Publication number: 20140054560Abstract: A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.Type: ApplicationFiled: February 15, 2013Publication date: February 27, 2014Inventors: Kanan Puntambekar, Lisa Stecker, Kurt Ulmer
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Publication number: 20130307073Abstract: A method is provided for controlling the channel length in a thin-film transistor (TFT). The method forms a printed ink first source/drain (S/D) structure overlying a substrate. A fluoropolymer mask is deposited to cover the first S/D structure. A boundary region is formed between the edge of the fluoropolymer mask and the edge of the printed ink first S/D structure, having a width. Then, a primary ink is printed at least partially overlying the boundary region, forming a printed ink second S/D structure, having an edge adjacent to the fluoropolymer mask edge. After removing the fluoropolymer mask, the printed ink first S/D structure edge is left separated from the printed ink second S/D structure edge by a space equal to the boundary region width. A semiconductor channel is formed partially overlying the first and second S/D structures, having a channel length equal to the boundary region width.Type: ApplicationFiled: May 15, 2012Publication date: November 21, 2013Inventors: Kurt Ulmer, Kanan Puntambekar
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Publication number: 20130260536Abstract: A method is provided for controlling printed ink horizontal cross-sectional areas using fluoropolymer templates. The method initially forms a fluoropolymer template overlying a substrate. The fluoropolymer template has a horizontal first cross-sectional dimension. Then, a primary ink is printed overlying the fluoropolymer template having a horizontal second cross-sectional dimension less than the first cross-sectional dimension. In the case of a fluoropolymer line having a template length greater than a template width, where the template width is the first cross-sectional dimension, printing the primary ink entails printing a primary ink line having an ink length greater than an ink width, where the ink width is the second cross-sectional dimension. In one aspect, the method prints a plurality of primary ink layers, each primary ink layer having an ink width less than the template width. Each overlying primary ink layer can be printed prior to solvents in underlying primary ink layers evaporating.Type: ApplicationFiled: March 28, 2012Publication date: October 3, 2013Inventors: Kurt ULMER, Kanan PUNTAMBEKAR, Lisa H. STECKER
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Patent number: 8513720Abstract: A top gate and bottom gate thin film transistor (TFT) are provided with an associated fabrication method. The TFT is fabricated from a substrate, and an active metal oxide semiconductor (MOS) layer overlying the substrate. Source/drain (S/D) regions are formed in contact with the active MOS layer. A channel region is interposed between the S/D regions. The TFT includes a gate electrode, and a gate dielectric interposed between the channel region and the gate electrode. The active MOS layer may be ZnOx, InOx, GaOx, SnOx, or combinations of the above-mentioned materials. The active MOS layer also includes a primary dopant such as H, K, Sc, La, Mo, Bi, Ce, Pr, Nd, Sm, Dy, or combinations of the above-mentioned dopants. The active MOS layer may also include a secondary dopant.Type: GrantFiled: July 14, 2010Date of Patent: August 20, 2013Assignee: Sharp Laboratories of America, Inc.Inventors: Gregory S. Herman, Jer-shen Maa, Kanan Puntambekar, Apostolos T. Voutsas
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Patent number: 8399290Abstract: A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.Type: GrantFiled: January 19, 2011Date of Patent: March 19, 2013Assignee: Sharp Laboratories of America, Inc.Inventors: Kanan Puntambekar, Lisa H. Stecker, Kurt Ulmer
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Patent number: 8367459Abstract: A method is provided for preparing an interface surface for the deposition of an organic semiconductor material, in the fabrication of an organic thin film transistor (OTFT). A substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode. Then, source (S) and drain (D) electrodes are formed overlying the gate dielectric, exposing a gate dielectric channel interface region between the S/D electrodes. Subsequent to exposing the OTFT to a H2 or N2 plasma, a self-assembled organic monolayer is formed overlying the S/D electrodes. Finally, an active organic semiconductor layer is formed over the S/D electrodes and gate dielectric channel interface. The OTFT may be exposed to plasma either before or after the formation of the S/D electrodes.Type: GrantFiled: December 14, 2010Date of Patent: February 5, 2013Assignee: Sharp Laboratories Of America, Inc.Inventors: Lisa H. Stecker, Kanan Puntambekar, Kurt Ulmer
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Publication number: 20120181512Abstract: A method is provided for fabricating a printed organic thin film transistor (OTFT) with a patterned organic semiconductor using a fluropolymer banked crystallization well. In the case of a bottom gate OTFT, a substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode, and source (S) and drain (D) electrodes are formed overlying the gate dielectric. A gate dielectric OTFT channel interface region is formed between the S/D electrodes. A well with fluropolymer containment and crystallization banks is then formed, to define an organic semiconductor print area. The well is filled with an organic semiconductor, covering the S/D electrodes and the gate dielectric OTFT channel interface. Then, the organic semiconductor is crystallized. Predominant crystal grain nucleation originates from regions overlying the S/D electrodes. As a result, an organic semiconductor channel is formed, interposed between the S/D electrodes.Type: ApplicationFiled: January 19, 2011Publication date: July 19, 2012Inventors: Kanan Puntambekar, Lisa H. Stecker, Kurt Ulmer
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Publication number: 20120146002Abstract: A method is provided for preparing an interface surface for the deposition of an organic semiconductor material, in the fabrication of an organic thin film transistor (OTFT). A substrate is provided and a gate electrode is formed overlying the substrate. A gate dielectric is formed overlying the gate electrode. Then, source (S) and drain (D) electrodes are formed overlying the gate dielectric, exposing a gate dielectric channel interface region between the S/D electrodes. Subsequent to exposing the OTFT to a H2 or N2 plasma, a self-assembled organic monolayer is formed overlying the S/D electrodes. Finally, an active organic semiconductor layer is formed over the S/D electrodes and gate dielectric channel interface. The OTFT may be exposed to plasma either before or after the formation of the S/D electrodes.Type: ApplicationFiled: December 14, 2010Publication date: June 14, 2012Inventors: Lisa H. Stecker, Kanan Puntambekar, Kurt Ulmer
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Publication number: 20120012835Abstract: A top gate and bottom gate thin film transistor (TFT) are provided with an associated fabrication method. The TFT is fabricated from a substrate, and an active metal oxide semiconductor (MOS) layer overlying the substrate. Source/drain (S/D) regions are formed in contact with the active MOS layer. A channel region is interposed between the S/D regions. The TFT includes a gate electrode, and a gate dielectric interposed between the channel region and the gate electrode. The active MOS layer may be ZnOx, InOx, GaOx, SnOx, or combinations of the above-mentioned materials. The active MOS layer also includes a primary dopant such as H, K, Sc, La, Mo, Bi, Ce, Pr, Nd, Sm, Dy, or combinations of the above-mentioned dopants. The active MOS layer may also include a secondary dopant.Type: ApplicationFiled: July 14, 2010Publication date: January 19, 2012Inventors: Gregory Herman, Jer-shen Maa, Kanan Puntambekar, Apostolos T. Voutsas