Abstract: A dynamically reconfigurable battery framework for management of a large-scale battery system systems is provided. The framework monitors, reconfigures, and controls large-scale battery systems online. The framework is built upon a topology-based bypassing mechanism that provides a set of rules for changing the battery-pack configuration, and a semantic bypassing mechanism by which the battery-cell connectivity is reconfigured to recover from a battery-cell failure. More specifically, the semantic bypassing mechanism implements a constant-voltage-keeping policy and a dynamic-voltage-allowing policy. The former policy is effective in preventing unavoidable voltage drops during the battery lifetime, while the latter policy is effective in supplying different amounts of power to meet a wide-range of application requirements.

Abstract: A dynamically reconfigurable framework is provided for a large-scale battery system. The framework is comprised of a plurality of battery circuits arranged adjacent to each other to form a battery-cell array that is coupled to an application load. A given battery circuit includes: a battery cell with an input terminal and an output terminal; a first switch connected between the load and an input terminal of the battery cell; a second switch is connected between an input terminal of the battery cell and an output terminal of a battery cell in an immediately adjacent battery circuit; and a third switch connected between the output terminal of the battery cell and the output terminal of the battery cell in the adjacent battery circuit. The battery-cell array also includes a local controller that selectively controls the switches in the plurality of battery circuits.

Abstract: A method for preventing digital piracy in a computing environment comprises loading an application into the computing environment, wherein the application is encrypted using a cryptographic key; assigning a virtual address space to the application; loading the cryptographic key for the application into a register which is accessible only by a central processing unit; and storing an index value for the key in the register in a page table entry which corresponds to the virtual address space for the application, thereby linking the virtual address space to the key for the application.

Abstract: A method and system for controlling network traffic to a network computer such as a server is provided wherein such control is provided based on a measured capacity of the server to service the network traffic and rule data which represents different policies for servicing the network traffic. A load-controller of the system installs more or less restrictive packet or request filtering policies based on the capacity of the server to throttle the traffic to the server. The method and system are sensitive to the actual capacity of the server by adopting this adaptive traffic-shaping feature instead of using rigid policies to control resource usage on the server.

Abstract: A method and apparatus for improved data communications over a token ring interface in which a target token rotation time value is a function of an initial target token rotation time value, the summation of the high priority token holding times for each node on the ring, and the time required to transmit a maximum size packet. Furthermore, the target rotation timer for the token ring network is activated only when the node is not transmitting in a synchronous manner.

Abstract: An interconnection network for a plurality of process nodes, each illustratively comprised of a processor-memory pair, utilizes an hexagonal mesh arrangement of size n which is wrapped in each of the x, y, and z directions. In accordance with the invention, a unique address value is assigned to each processor node in the network, beginning at a central processor node and continuing along the x direction, and via the wrapping links, until each such processor node has a unique sequential address. Each of the rows, having first and last processor nodes therein, is wrapped by coupling each of the last processor nodes in each row to a respective first processor node in a corresponding row which is n-1 rows away. Point-to-point communication is achieved using the unique addresses of only the source and destination processor nodes, without requiring each intermediate processor node to contain global information about the entire network.