Patents by Inventor Kang-Sik Cho
Kang-Sik Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12002404Abstract: A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.Type: GrantFiled: April 10, 2023Date of Patent: June 4, 2024Assignee: Samsung Display Co., Ltd.Inventors: Kang Nam Kim, Sung Hoon Lim, Woo Geun Lee, Kyu Sik Cho, Jae Beom Choi
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Publication number: 20240177114Abstract: Provided are a system for business process automation and a method thereof. The system according to some embodiments may include a connect manager configured to register and manage application programming interface (API) information for services, a process execution engine configured to execute a target business process comprising a particular service task, which is a task using a particular service provided by a service module, and a connect broker configured to acquire API information for the particular service, registered through the connect manager, during execution of the target business process in response to a request from the process execution engine, and process the particular service task by sending a request for the particular service to the service module using the acquired API information.Type: ApplicationFiled: November 13, 2023Publication date: May 30, 2024Applicant: SAMSUNG SDS CO., LTD.Inventors: Young Sik JUNG, Moo Young CHO, Kang Hyeok LEE, Hyong Gook KIM, In Yong JANG, Chul Ho CHOI, Jeong Heon KIM, Ho Kyung YOO, Yeong Ho LEE, Kyung Ho CHO, Tae Jin HWANG, Jung Hee YOON, Hee Jong KIM
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Publication number: 20180222104Abstract: A method for manufacturing a synthetic resin scouring pad includes hot extruding a polymer by thermally melting a synthetic resin, along a T die having a straight extrusion port, to form a full width film sheet; cold-curing the film sheet by impregnating and quenching the extruded full width film sheet with cooling water of a cooling bath; forming flat film filaments by passing the full width film sheet lengthwise through a cutting part in which cutting blades are arranged at a predetermined width so as to dividingly-cut the full width film sheet into a predetermined width; passing the flat film filaments in the longitudinal direction through a coiling forming part to plastic-deform the flat film filaments into coil-shaped film filaments; and inputting the coil-shaped film filaments into an annular winding part so that the film filaments are wound in an annular shape to form a synthetic resin scouring pad.Type: ApplicationFiled: September 14, 2015Publication date: August 9, 2018Applicant: KWANG JIN IND. CO., LTD.Inventors: Hyeong-Cheol HWANG, Kang-Sik CHO, Dae-Hwan KIM, Heon-Joo JEONG
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Patent number: 7112856Abstract: A semiconductor device includes an insulated gate electrode pattern formed on a well region. The semiconductor device further includes a sidewall spacer formed on sidewalls of the gate electrode pattern. A source region and a drain region are formed adjacent opposite sides of the gate pattern. In accordance with one embodiment of the present invention, one of the source or drain regions includes a first-concentration impurity region formed under the sidewall spacer. The semiconductor device further includes a silicide layer formed within the well region wherein at least a part of the silicide layer contacts a portion of the well region to bias the well region. A method of manufacturing the semiconductor device is also provided.Type: GrantFiled: July 12, 2002Date of Patent: September 26, 2006Assignee: Samsung Electronics Co., Ltd.Inventors: Kang-Sik Cho, Gyu-Chul Kim, Hoo-Sung Cho
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Patent number: 7105917Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device has a probing pad formed on a chip. The probing pad is connected to an output pad and an internal circuit though a fuse. After an electrical testing of the chip by the probing pad, the fuse is cut by a laser beam. Therefore, the probing pad is disconnected from the output pad and the internal circuit. The output pad is connected to an output lead of a package, which is encapsulating the chip. According to the device and the fabrication methods thereof, performance of the device can be enhanced by a low parasitic capacitance and a low parasitic resistance.Type: GrantFiled: September 13, 2001Date of Patent: September 12, 2006Assignee: Samsung Electronics Co., Ltd.Inventors: Kang-Sik Cho, Chul-Sung Park, Gyu-Chul Kim
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Publication number: 20060189088Abstract: A semiconductor device includes an insulated gate electrode pattern formed on a well region. The semiconductor device further includes a sidewall spacer formed on sidewalls of the gate electrode pattern. A source region and a drain region are formed adjacent opposite sides of the gate pattern. In accordance with one embodiment of the present invention, one of the source or drain regions includes a first-concentration impurity region formed under the sidewall spacer. The semiconductor device further includes a silicide layer formed within the well region wherein at least a part of the silicide layer contacts a portion of the well region to bias the well region. A method of manufacturing the semiconductor device is also provided.Type: ApplicationFiled: May 3, 2006Publication date: August 24, 2006Applicant: Samsung Electronics Co., Ltd.Inventors: Kang-Sik CHO, Gyu-Chul KIM, Hoo-Sung CHO
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Patent number: 6724052Abstract: A semiconductor device includes a substrate of a first conductive type, and a well region of an opposite second conductive type is formed in the substrate. A first impurity region of the first conductive type extends to a first depth within the well region, and a second impurity region of the first conductive type is spaced from the first impurity region to define a channel region therebetween and extends to a second depth within the well region. Preferably, the second depth is greater than the first depth. A gate electrode is located over the channel region, and a silicide layer is formed at a third depth within the first impurity region. The third depth is less than the first depth, and a difference between the first depth and the third depth is less than or equal to a difference at which a leakage current from the silicide layer to the well region is sufficient to electrically bias the well region through the silicide layer.Type: GrantFiled: July 15, 2002Date of Patent: April 20, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Kang-Sik Cho, Hoo-Seung Cho, Gyu-Chul Kim, Yong Park, Han-Soo Kim
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Publication number: 20040007744Abstract: A semiconductor device includes an insulated gate electrode pattern formed on a well region. The semiconductor device further includes a sidewall spacer formed on sidewalls of the gate electrode pattern. A source region and a drain region are formed adjacent opposite sides of the gate pattern. In accordance with one embodiment of the present invention, one of the source or drain regions includes a first-concentration impurity region formed under the sidewall spacer. The semiconductor device further includes a silicide layer formed within the well region wherein at least a part of the silicide layer contacts a portion of the well region to bias the well region. A method of manufacturing the semiconductor device is also provided.Type: ApplicationFiled: July 12, 2002Publication date: January 15, 2004Applicant: Samsung Electronics Co., Ltd.Inventors: Kang-Sik Cho, Gyu-Chul Kim, Hoo-Sung Cho
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Publication number: 20020179979Abstract: A semiconductor device includes a substrate of a first conductive type, and a well region of an opposite second conductive type is formed in the substrate. A first impurity region of the first conductive type extends to a first depth within the well region, and a second impurity region of the first conductive type is spaced from the first impurity region to define a channel region therebetween and extends to a second depth within the well region. Preferably, the second depth is greater than the first depth. A gate electrode is located over the channel region, and a silicide layer is formed at a third depth within the first impurity region. The third depth is less than the first depth, and a difference between the first depth and the third depth is less than or equal to a difference at which a leakage current from the silicide layer to the well region is sufficient to electrically bias the well region through the silicide layer.Type: ApplicationFiled: July 15, 2002Publication date: December 5, 2002Inventors: Kang-Sik Cho, Hoo-Seung Cho, Gyu-Chul Kim, Yong Park, Han-Soo Kim
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Publication number: 20020135055Abstract: A semiconductor device and a fabrication method thereof are provided. The semiconductor device has a probing pad formed on a chip. The probing pad is connected to an output pad and an internal circuit though a fuse. After an electrical testing of the chip by the probing pad, the fuse is cut by a laser beam. Therefore, the probing pad is disconnected from the output pad and the internal circuit. The output pad is connected to an output lead of a package, which is encapsulating the chip. According to the device and the fabrication methods thereof, performance of the device can be enhanced by a low parasitic capacitance and a low parasitic resistance.Type: ApplicationFiled: September 13, 2001Publication date: September 26, 2002Applicant: Samsung Electronics Co., Ltd.Inventors: Kang-Sik Cho, Chul-Sung Park, Gyu-Chul Kim