Patents by Inventor Kang Sub Yim

Kang Sub Yim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230142684
    Abstract: Method of forming low-k films with reduced dielectric constant, reduced CHx content, and increased hardness are described. A siloxane film is on a substrate surface using a siloxane precursor comprising O—Si—O bonds and cured using ultraviolet light.
    Type: Application
    Filed: December 21, 2021
    Publication date: May 11, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Bo Xie, Ruitong Xiong, Sure K. Ngo, Kang Sub Yim, Yijun Liu, Li-Qun Xia
  • Patent number: 11621162
    Abstract: Semiconductor processing methods are described for forming UV-treated, low-? dielectric films. The methods may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-and-carbon-containing precursor. The methods may further include generating a deposition plasma from the deposition precursors within the substrate processing region, and depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The as-deposited silicon-and-carbon-containing material may be characterized by greater than or about 5% hydrocarbon groups. The methods may still further include exposing the deposited silicon-and-carbon-containing material to ultraviolet light. The exposed silicon-and-carbon-containing material may be characterized by less than or about 2% hydrocarbon groups.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: April 4, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Bo Xie, Ruitong Xiong, Sure Ngo, Kang Sub Yim, Yijun Liu, Li-Qun Xia
  • Publication number: 20230094180
    Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include flowing a silicon-and-carbon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the silicon-and-carbon-containing precursor. The plasma may be formed at a frequency above 15 MHz. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant below or about 3.0.
    Type: Application
    Filed: December 5, 2022
    Publication date: March 30, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Shaunak Mukherjee, Kang Sub Yim, Deenesh Padhi, Abhijit A. Kangude, Rahul Rajeev, Shubham Chowdhuri
  • Patent number: 11600486
    Abstract: Embodiments of the semiconductor processing methods to form low-? films on semiconductor substrates are described. The processing methods may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-containing precursor that has at least one vinyl group. The methods may further include generating a deposition plasma in the substrate processing region from the deposition precursors. A silicon-and-carbon-containing material, characterized by a dielectric constant (? value) less than or about 3.0, may be deposited on the substrate from plasma effluents of the deposition plasma.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: March 7, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Bo Xie, Ruitong Xiong, Sure K. Ngo, Kang Sub Yim, Yijun Liu, Li-Qun Xia
  • Patent number: 11594409
    Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include flowing a silicon-and-carbon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the silicon-and-carbon-containing precursor. The plasma may be formed at a frequency above 15 MHz. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant below or about 3.0.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: February 28, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Shaunak Mukherjee, Kang Sub Yim, Deenesh Padhi, Abhijit A. Kangude, Rahul Rajeev, Shubham Chowdhuri
  • Patent number: 11572622
    Abstract: Exemplary semiconductor processing methods to clean a substrate processing chamber are described. The methods may include depositing a dielectric film on a first substrate in a substrate processing chamber, where the dielectric film may include a silicon-carbon-oxide. The first substrate having the dielectric film may be removed from the substrate processing chamber, and the dielectric film may be deposited on at least one more substrate in the substrate processing chamber. The at least one more substrate may be removed from the substrate processing chamber after the dielectric film is deposited on the substrate. Etch plasma effluents may flow into the substrate processing chamber after the removal of a last substrate having the dielectric film. The etch plasma effluents may include greater than or about 500 sccm of NF3 plasma effluents, and greater than or about 1000 sccm of O2 plasma effluents.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: February 7, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Bo Xie, Ruitong Xiong, Kang Sub Yim, Yijun Liu, Li-Qun Xia, Sure K. Ngo
  • Patent number: 11393678
    Abstract: Methods for deposition of high-hardness low-? dielectric films are described. More particularly, a method of processing a substrate is provided. The method includes flowing a precursor-containing gas mixture into a processing volume of a processing chamber having a substrate, the precursor having the general formula (I) wherein R1, R2, R3, R4, R5, R6, R7, and R8 are independently selected from hydrogen (H), alkyl, alkoxy, vinyl, silane, amine, or halide; maintaining the substrate at a pressure in a range of about 0.1 mTorr and about 10 Torr and at a temperature in a range of about 200° C. to about 500° C.; and generating a plasma at a substrate level to deposit a dielectric film on the substrate.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: July 19, 2022
    Assignee: Applied Materials, Inc.
    Inventors: William J. Durand, Mark Saly, Lakmal C. Kalutarage, Kang Sub Yim, Shaunak Mukherjee
  • Publication number: 20220108884
    Abstract: Semiconductor processing methods are described for forming UV-treated, low-? dielectric films. The methods may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-and-carbon-containing precursor. The methods may further include generating a deposition plasma from the deposition precursors within the substrate processing region, and depositing a silicon-and-carbon-containing material on the substrate from plasma effluents of the deposition plasma. The as-deposited silicon-and-carbon-containing material may be characterized by greater than or about 5% hydrocarbon groups. The methods may still further include exposing the deposited silicon-and-carbon-containing material to ultraviolet light. The exposed silicon-and-carbon-containing material may be characterized by less than or about 2% hydrocarbon groups.
    Type: Application
    Filed: October 5, 2020
    Publication date: April 7, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Bo Xie, Ruitong Xiong, Sure Ngo, Kang Sub Yim, Yijun Liu, Li-Qun Xia
  • Patent number: 11289369
    Abstract: A method of forming a low-k dielectric layer with barrier properties is disclosed. The method comprises forming a dielectric layer by PECVD which is doped with one or more of boron, nitrogen or phosphorous. The dopant gas of some embodiments may be coflowed with the other reactants during deposition.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: March 29, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Yi Ding, Shaunak Mukherjee, Bo Xie, Kang Sub Yim, Deenesh Padhi
  • Publication number: 20220081765
    Abstract: Exemplary semiconductor processing methods to clean a substrate processing chamber are described. The methods may include depositing a dielectric film on a first substrate in a substrate processing chamber, where the dielectric film may include a silicon-carbon-oxide. The first substrate having the dielectric film may be removed from the substrate processing chamber, and the dielectric film may be deposited on at least one more substrate in the substrate processing chamber. The at least one more substrate may be removed from the substrate processing chamber after the dielectric film is deposited on the substrate. Etch plasma effluents may flow into the substrate processing chamber after the removal of a last substrate having the dielectric film. The etch plasma effluents may include greater than or about 500 sccm of NF3 plasma effluents, and greater than or about 1000 sccm of O2 plasma effluents.
    Type: Application
    Filed: September 14, 2020
    Publication date: March 17, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Bo Xie, Ruitong Xiong, Kang Sub Yim, Yijun Liu, Li-Qun Xia, Sure Ngo
  • Publication number: 20220084815
    Abstract: Embodiments of the semiconductor processing methods to form low-? films on semiconductor substrates are described. The processing methods may include flowing deposition precursors into a substrate processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-containing precursor that has at least one vinyl group. The methods may further include generating a deposition plasma in the substrate processing region from the deposition precursors. A silicon-and-carbon-containing material, characterized by a dielectric constant (? value) less than or about 3.0, may be deposited on the substrate from plasma effluents of the deposition plasma.
    Type: Application
    Filed: September 15, 2020
    Publication date: March 17, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Bo Xie, Ruitong Xiong, Sure Ngo, Kang Sub Yim, Yijun Liu, Li-Qun Xia
  • Publication number: 20210272800
    Abstract: Exemplary methods of forming a silicon-and-carbon-containing material may include flowing a silicon-and-carbon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region of the semiconductor processing chamber. The methods may include forming a plasma within the processing region of the silicon-and-carbon-containing precursor. The plasma may be formed at a frequency above 15 MHz. The methods may include depositing a silicon-and-carbon-containing material on the substrate. The silicon-and-carbon-containing material as-deposited may be characterized by a dielectric constant below or about 3.0.
    Type: Application
    Filed: June 16, 2020
    Publication date: September 2, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Shaunak Mukherjee, Kang Sub Yim, Deenesh Padhi, Abhijit A. Kangude, Rahul Rajeev, Shubham Chowdhuri
  • Publication number: 20210050212
    Abstract: Methods for deposition of high-hardness low-? dielectric films are described. More particularly, a method of processing a substrate is provided. The method includes flowing a precursor-containing gas mixture into a processing volume of a processing chamber having a substrate, the precursor having the general formula (I) wherein R1, R2, R3, R4, R5, R6, R7, and R8 are independently selected from hydrogen (H), alkyl, alkoxy, vinyl, silane, amine, or halide; maintaining the substrate at a pressure in a range of about 0.1 mTorr and about 10 Torr and at a temperature in a range of about 200° C. to about 500° C.; and generating a plasma at a substrate level to deposit a dielectric film on the substrate.
    Type: Application
    Filed: August 10, 2020
    Publication date: February 18, 2021
    Applicant: Applied Materials, Inc.
    Inventors: William J. Durand, Mark Saly, Lakmal C. Kalutarage, Kang Sub Yim, Shaunak Mukherjee
  • Publication number: 20200388532
    Abstract: A method of forming a low-k dielectric layer with barrier properties is disclosed. The method comprises forming a dielectric layer by PECVD which is doped with one or more of boron, nitrogen or phosphorous. The dopant gas of some embodiments may be coflowed with the other reactants during deposition.
    Type: Application
    Filed: June 8, 2020
    Publication date: December 10, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Yi Ding, Shaunak Mukherjee, Bo Xie, Kang Sub Yim, Deenesh Padhi
  • Publication number: 20200126784
    Abstract: Embodiments described herein generally relate to methods of manufacturing an oxide/polysilicon (OP) stack of a 3D memory cell for memory devices, such as NAND devices. The methods generally include treatment of the oxide and/or polysilicon materials with precursors during PECVD processes to lower the dielectric constant of the oxide and reduce the resistivity of the polysilicon. In one embodiment, the oxide material is treated with octamethylcyclotetrasiloxane (OMCTS) precursor. In another embodiment, germane (GeH4) is introduced to a PECVD process to form SixGe(1?x) films with dopant. In yet another embodiment, a plasma treatment process is used to nitridate the interface between layers of the OP stack. The precursors and plasma treatment may be used alone or in any combination to produce OP stacks with low dielectric constant oxide and low resistivity polysilicon.
    Type: Application
    Filed: December 18, 2019
    Publication date: April 23, 2020
    Inventors: Xinhai HAN, Kang Sub YIM, Zhijun JIANG, Deenesh PADHI
  • Publication number: 20200075321
    Abstract: Embodiments described herein provide a method of forming a low-k carbon-doped silicon oxide (CDO) layer having a high hardness by a plasma-enhanced chemical vapor deposition (PECVD) process. The method includes providing a carrier gas at a carrier gas flow rate and a CDO precursor at a precursor flow rate to a process chamber. A radio frequency (RF) power is applied at a power level and a frequency to the CDO precursor. The CDO layer is deposited on a substrate within the process chamber.
    Type: Application
    Filed: August 27, 2019
    Publication date: March 5, 2020
    Inventors: Shaunak MUKHERJEE, Bo XIE, Kevin Michael CHO, Kang Sub YIM, Deenesh PADHI, Astha GARG
  • Patent number: 10553427
    Abstract: Embodiments described herein generally relate to methods of manufacturing an oxide/polysilicon (OP) stack of a 3D memory cell for memory devices, such as NAND devices. The methods generally include treatment of the oxide and/or polysilicon materials with precursors during PECVD processes to lower the dielectric constant of the oxide and reduce the resistivity of the polysilicon. In one embodiment, the oxide material is treated with octamethylcyclotetrasiloxane (OMCTS) precursor. In another embodiment, germane (GeH4) is introduced to a PECVD process to form SixGe(1-x) films with dopant. In yet another embodiment, a plasma treatment process is used to nitridate the interface between layers of the OP stack. The precursors and plasma treatment may be used alone or in any combination to produce OP stacks with low dielectric constant oxide and low resistivity polysilicon.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: February 4, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Xinhai Han, Kang Sub Yim, Zhijun Jiang, Deenesh Padhi
  • Publication number: 20180315592
    Abstract: Embodiments described herein generally relate to methods of manufacturing an oxide/polysilicon (OP) stack of a 3D memory cell for memory devices, such as NAND devices. The methods generally include treatment of the oxide and/or polysilicon materials with precursors during PECVD processes to lower the dielectric constant of the oxide and reduce the resistivity of the polysilicon. In one embodiment, the oxide material is treated with octamethylcyclotetrasiloxane (OMCTS) precursor. In another embodiment, germane (GeH4) is introduced to a PECVD process to form SixGe(1-x) films with dopant. In yet another embodiment, a plasma treatment process is used to nitridate the interface between layers of the OP stack. The precursors and plasma treatment may be used alone or in any combination to produce OP stacks with low dielectric constant oxide and low resistivity polysilicon.
    Type: Application
    Filed: April 20, 2018
    Publication date: November 1, 2018
    Inventors: Xinhai HAN, Kang Sub YIM, Zhijun JIANG, Deenesh PADHI
  • Patent number: 10113234
    Abstract: Embodiments described herein provide a method for sealing a porous low-k dielectric film. The method includes forming a sealing layer on the porous low-k dielectric film using a cyclic process. The cyclic process includes repeating a sequence of depositing a sealing layer on the porous low-k dielectric film and treating the sealing layer until the sealing layer achieves a predetermined thickness. The treating of each intermediate sealing layer generates more reactive sites on the surface of each intermediate sealing layer, which improves the quality of the resulting sealing layer.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: October 30, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Bo Xie, Alexandros T. Demos, Vu Ngoc Tran Nguyen, Kelvin Chan, He Ren, Kang Sub Yim, Mehul B. Naik
  • Patent number: 9850574
    Abstract: A low-k dielectric porous silicon oxycarbon layer is formed within an integrated circuit. In one embodiment, a porogen and bulk layer containing silicon oxycarbon layer is deposited, the porogens are selectively removed from the formed layer without simultaneously cross-linking the bulk layer, and then the bulk layer material is cross-linked. In other embodiments, multiple silicon oxycarbon sublayers are deposited, porogens from each sub-layer are selectively removed without simultaneously cross-linking the bulk material of the sub-layer, and the sub-layers are cross-linked separately.
    Type: Grant
    Filed: February 16, 2015
    Date of Patent: December 26, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Taewan Kim, Kang Sub Yim, Alexandros T. Demos