Abstract: A computer assigns many threads to a hardware pipeline that contains a sequence of hardware stages that include a computing stage, a suspending stage, and a resuming stage. Each cycle of the hardware pipeline can concurrently execute a respective distinct stage of the sequence of hardware stages for a respective distinct thread. A read of random access memory (RAM) can be requested for a thread only during the suspending stage. While a previous state of a finite state machine (FSM) that implements a coroutine of the thread is in the suspending stage, a read of RAM is requested, and the thread is unconditionally suspended. While the coroutine of the thread is in the resuming stage, an asynchronous response from RAM is correlated to the thread and to a next state of the FSM. While in the computing stage, the next state of the FSM executes based on the asynchronous response from RAM.

Abstract: A method and apparatus for controlling writing of data in a storage unit based on a NAND flash memory are provided. The method includes determining reference values for classifying dirty pages to be written in the storage unit into a plurality of groups; calculating, with respect to each of the dirty pages, a hotness indicating a possibility of a change of data; classifying the dirty pages into the groups corresponding to reference values most similar to the calculated hotness; determining whether sizes of the groups are greater than a size of a segment, where the segment is a unit for performing a write request in the storage unit; and requesting a write operation for each segment with respect to groups having a size at least equal to the size of the segment to the storage unit.