Patents by Inventor Kao-Feng Liao
Kao-Feng Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240087951Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Patent number: 11854872Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.Type: GrantFiled: July 20, 2022Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Publication number: 20230271298Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.Type: ApplicationFiled: May 5, 2023Publication date: August 31, 2023Inventors: Michael Yen, Kao-Feng Liao, Hsin-Ying Ho, Chun-Wen Hsiao, Sheng-Chao Chuang, Ting-Hsun Chang, Fu-Ming Huang, Chun-Chieh Lin, Peng-Chung Jangjian, Ji James Cui, Liang-Guang Chen, Chih Hung Chen, Kei-Wei Chen
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Patent number: 11679469Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.Type: GrantFiled: August 23, 2019Date of Patent: June 20, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Michael Yen, Kao-Feng Liao, Hsin-Ying Ho, Chun-Wen Hsiao, Sheng-Chao Chuang, Ting-Hsun Chang, Fu-Ming Huang, Chun-Chieh Lin, Peng-Chung Jangjian, Ji James Cui, Liang-Guang Chen, Chih Hung Chen, Kei-Wei Chen
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Publication number: 20230078573Abstract: A planarization method includes: providing a substrate, wherein the substrate includes a first region and a second region having different degrees of hydrophobicity or hydrophilicity, the second region covering an upper surface of the first region; polishing the substrate with a polishing slurry until the upper surface of the first region is exposed; and continuing polishing and performing a surface treatment by the polishing slurry to adjust the degree of hydrophobicity or hydrophilicity of at least one of the first region and the second region. The polishing slurry and the upper surface of the second region have a first contact angle, and the polishing slurry and the upper surface of the first region have a second contact angle. The surface treatment keeps a contact angle difference between the first contact angle and the second contact angle being equal to or less than 30 degrees during the polishing.Type: ApplicationFiled: June 23, 2022Publication date: March 16, 2023Inventors: TUNG-KAI CHEN, CHING-HSIANG TSAI, KAO-FENG LIAO, CHIH-CHIEH CHANG, CHUN-HAO KUNG, FANG-I CHIH, HSIN-YING HO, CHIA-JUNG HSU, HUI-CHI HUANG, KEI-WEI CHEN
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Publication number: 20220367257Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.Type: ApplicationFiled: July 20, 2022Publication date: November 17, 2022Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Patent number: 11417566Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.Type: GrantFiled: April 12, 2019Date of Patent: August 16, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Patent number: 11373879Abstract: A planarization method and a CMP method are provided. The planarization method includes providing a substrate with a first region and a second region having different degrees of hydrophobicity or hydrophilicity and performing a surface treatment to the first region to render the degrees of hydrophobicity or hydrophilicity in proximity to that of the second region. The CMP method includes providing a substrate with a first region and a second region; providing a polishing slurry on the substrate, wherein the polishing slurry and the surface of the first region have a first contact angle, and the polishing slurry and the surface of the first region have a second contact angle; modifying the surface of the first region to make a contact angle difference between the first contact angle and the second contact angle equal to or less than 30 degrees.Type: GrantFiled: September 12, 2020Date of Patent: June 28, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Tung-Kai Chen, Ching-Hsiang Tsai, Kao-Feng Liao, Chih-Chieh Chang, Chun-Hao Kung, Fang-I Chih, Hsin-Ying Ho, Chia-Jung Hsu, Hui-Chi Huang, Kei-Wei Chen
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Publication number: 20220017780Abstract: A slurry composition, a polishing method and an integrated circuit are provided. The slurry composition includes a slurry and at least one cationic surfactant having at least one nitrogen atom in the molecule. The slurry includes at least one liquid carrier, at least one abrasive and at least one pH adjusting agent, and has a pH of less than 7.0. The polishing method includes using the slurry composition with the cationic surfactant to polish a conductive layer. The integrated circuit comprises a block layer comprising the cationic surfactant between a sidewall of the conductive plug and an interlayer dielectric layer.Type: ApplicationFiled: November 24, 2020Publication date: January 20, 2022Inventors: JI CUI, CHI-JEN LIU, CHIH-CHIEH CHANG, KAO-FENG LIAO, PENG-CHUNG JANGJIAN, CHUN-WEI HSU, TING-HSUN CHANG, LIANG-GUANG CHEN, KEI-WEI CHEN, HUI-CHI HUANG
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Publication number: 20210371702Abstract: A slurry composition, a polishing method and an integrated circuit are provided. The slurry composition includes a slurry and at least one rheology modifier. The slurry includes at least one liquid carrier, at least one abrasives and at least one oxidizer. The rheology modifier is dispensed in the slurry. The polishing method includes using the slurry composition with the rheology modifier to polish a conductive layer.Type: ApplicationFiled: January 5, 2021Publication date: December 2, 2021Inventors: JI CUI, CHI-JEN LIU, LIANG-GUANG CHEN, KEI-WEI CHEN, CHUN-WEI HSU, LI-CHIEH WU, PENG-CHUNG JANGJIAN, KAO-FENG LIAO, FU-MING HUANG, WEI-WEI LIANG, TANG-KUEI CHANG, HUI-CHI HUANG
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Patent number: 11189727Abstract: A device includes a semiconductor fin protruding from a substrate, a first gate stack over the semiconductor fin and a second gate stack over the semiconductor fin, a first source/drain region in the semiconductor fin adjacent the first gate stack and a second source/drain region in the semiconductor fin adjacent the second gate stack, a first layer of a first dielectric material on the first gate stack and a second layer of the first dielectric material on the second gate stack, a first source/drain contact on the first source/drain region and adjacent the first gate stack, a first layer of a second dielectric material on a top surface of the first source/drain contact, and a second source/drain contact on the second source/drain region and adjacent the second gate stack, wherein the top surface of the second source/drain contact is free of the second dielectric material.Type: GrantFiled: August 23, 2019Date of Patent: November 30, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Peng-Chung Jangjian, Kao-Feng Liao, Chun-Wen Hsiao, Hsin-Ying Ho, Sheng-Chao Chuang
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Patent number: 11145751Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a source/drain structure, a dielectric layer, a contact plug. The gate structure is positioned over a fin structure. The source/drain structure is positioned in the fin structure and adjacent to the gate structure. The dielectric layer is positioned over the gate structure and the source/drain structure. The contact plug is positioned passing through the dielectric layer. The contact plug includes a first metal compound including one of group III elements, group IV elements, group V elements or a combination thereof.Type: GrantFiled: March 29, 2018Date of Patent: October 12, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kuo-Ju Chen, Su-Hao Liu, Chun-Hao Kung, Liang-Yin Chen, Huicheng Chang, Kei-Wei Chen, Hui-Chi Huang, Kao-Feng Liao, Chih-Hung Chen, Jie-Huang Huang, Lun-Kuang Tan, Wei-Ming You
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Publication number: 20210313190Abstract: Methods of manufacturing a chemical-mechanical polishing (CMP) slurry and methods of performing CMP process on a substrate comprising metal features are described herein. The CMP slurry may be manufactured using a balanced concentration ratio of chelator additives to inhibitor additives, the ratio being determined based on an electro potential (Ev) value of a metal material of the substrate. The CMP process may be performed on the substrate based on the balanced concentration ratio of chelator additives to inhibitor additives of the CMP slurry.Type: ApplicationFiled: June 21, 2021Publication date: October 7, 2021Inventors: Chun-Hao Kung, Tung-Kai Chen, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Patent number: 11043396Abstract: Methods of manufacturing a chemical-mechanical polishing (CMP) slurry and methods of performing CMP process on a substrate comprising metal features are described herein. The CMP slurry may be manufactured using a balanced concentration ratio of chelator additives to inhibitor additives, the ratio being determined based on an electro potential (Ev) value of a metal material of the substrate. The CMP process may be performed on the substrate based on the balanced concentration ratio of chelator additives to inhibitor additives of the CMP slurry.Type: GrantFiled: November 2, 2018Date of Patent: June 22, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hao Kung, Tung-Kai Chen, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Publication number: 20210057571Abstract: A device includes a semiconductor fin protruding from a substrate, a first gate stack over the semiconductor fin and a second gate stack over the semiconductor fin, a first source/drain region in the semiconductor fin adjacent the first gate stack and a second source/drain region in the semiconductor fin adjacent the second gate stack, a first layer of a first dielectric material on the first gate stack and a second layer of the first dielectric material on the second gate stack, a first source/drain contact on the first source/drain region and adjacent the first gate stack, a first layer of a second dielectric material on a top surface of the first source/drain contact, and a second source/drain contact on the second source/drain region and adjacent the second gate stack, wherein the top surface of the second source/drain contact is free of the second dielectric material.Type: ApplicationFiled: August 23, 2019Publication date: February 25, 2021Inventors: Peng-Chung Jangjian, Kao-Feng Liao, Chun-Wen Hsiao, Hsin-Ying Ho, Sheng-Chao Chuang
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Publication number: 20210053180Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.Type: ApplicationFiled: August 23, 2019Publication date: February 25, 2021Inventors: Michael Yen, Kao-Feng Liao, Hsin-Ying Ho, Chun-Wen Hsiao, Sheng-Chao Chuang, Ting-Hsun Chang, Fu-Ming Huang, Chun-Chieh Lin, Peng-Chung Jangjian, Ji James Cui, Liang-Guang Chen, Chih Hung Chen, Kei-Wei Chen
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Publication number: 20200411329Abstract: A planarization method and a CMP method are provided. The planarization method includes providing a substrate with a first region and a second region having different degrees of hydrophobicity or hydrophilicity and performing a surface treatment to the first region to render the degrees of hydrophobicity or hydrophilicity in proximity to that of the second region. The CMP method includes providing a substrate with a first region and a second region; providing a polishing slurry on the substrate, wherein the polishing slurry and the surface of the first region have a first contact angle, and the polishing slurry and the surface of the first region have a second contact angle; modifying the surface of the first region to make a contact angle difference between the first contact angle and the second contact angle equal to or less than 30 degrees.Type: ApplicationFiled: September 12, 2020Publication date: December 31, 2020Inventors: TUNG-KAI CHEN, CHING-HSIANG TSAI, KAO-FENG LIAO, CHIH-CHIEH CHANG, CHUN-HAO KUNG, FANG-I CHIH, HSIN-YING HO, CHIA-JUNG HSU, HUI-CHI HUANG, KEI-WEI CHEN
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Patent number: 10777423Abstract: A planarization method and a CMP method are provided. The planarization method includes providing a substrate with a first region and a second region having different degrees of hydrophobicity or hydrophilicity and performing a surface treatment to the first region to render the degrees of hydrophobicity or hydrophilicity in proximity to that of the second region. The CMP method includes providing a substrate with a first region and a second region; providing a polishing slurry on the substrate, wherein the polishing slurry and the surface of the first region have a first contact angle, and the polishing slurry and the surface of the first region have a second contact angle; modifying the surface of the first region to make a contact angle difference between the first contact angle and the second contact angle equal to or less than 30 degrees.Type: GrantFiled: June 8, 2018Date of Patent: September 15, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Tung-Kai Chen, Ching-Hsiang Tsai, Kao-Feng Liao, Chih-Chieh Chang, Chun-Hao Kung, Fang-I Chih, Hsin-Ying Ho, Chia-Jung Hsu, Hui-Chi Huang, Kei-Wei Chen
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Publication number: 20200043777Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.Type: ApplicationFiled: April 12, 2019Publication date: February 6, 2020Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Publication number: 20200043745Abstract: Methods of manufacturing a chemical-mechanical polishing (CMP) slurry and methods of performing CMP process on a substrate comprising metal features are described herein. The CMP slurry may be manufactured using a balanced concentration ratio of chelator additives to inhibitor additives, the ratio being determined based on an electro potential (Ev) value of a metal material of the substrate. The CMP process may be performed on the substrate based on the balanced concentration ratio of chelator additives to inhibitor additives of the CMP slurry.Type: ApplicationFiled: November 2, 2018Publication date: February 6, 2020Inventors: Chun-Hao Kung, Tung-Kai Chen, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen