Patents by Inventor Kaoru Kanehachi

Kaoru Kanehachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7880553
    Abstract: An oscillation section for which an output frequency is controlled based on a control signal depending on an ambient temperature; a temperature compensation circuit for supplying the control signal to this oscillation section; and a switching switch circuit consisting of an output buffer and a temperature sensor output switch for which ON and OFF are controlled so that any one of an oscillation output from the oscillation section and a temperature sensor output from the temperature compensation circuit is outputted. The temperature sensor output switch is structured so that transfer gate switches are connected in a two-stage serial manner and a third switch connected to a fixed potential is sandwiched between these connection points. When an oscillation output is outputted, the transfer gate switches are OFF and the third switch is ON and, when a temperature sensor output is outputted, the transfer gate switches are ON and the third switch is OFF.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: February 1, 2011
    Assignee: Seiko NPC Kabushiki Kaisha
    Inventors: Jun Kikuchi, Toru Matsumoto, Kaoru Kanehachi
  • Publication number: 20090231049
    Abstract: An oscillation circuit of the present invention includes: an oscillation section for which an output frequency is controlled based on a control signal depending on an ambient temperature; a temperature compensation circuit for supplying the control signal to this oscillation section; and a switching switch circuit consisting of an output buffer and a temperature sensor output switch for which ON and OFF are controlled so that any one of an oscillation output from the oscillation section and a temperature sensor output from the temperature compensation circuit is outputted. The temperature sensor output switch is structured so that transfer gate switches are connected in a two-stage serial manner and a third switch connected to a fixed potential is sandwiched between these connection points. When an oscillation output is outputted, the transfer gate switches are OFF and the third switch is ON and, when a temperature sensor output is outputted, the transfer gate switches are ON and the third switch is OFF.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 17, 2009
    Inventors: Jun Kikuchi, Toru Matsumoto, Kaoru Kanehachi
  • Patent number: 7496169
    Abstract: A frequency synthesizer comprises a digital/analog converter which sequentially converts difference data of phase data indicating the phase of a reference signal to an analog value, a voltage signal generator which integrates the analog value converted by the digital/analog converter, thereby generating a voltage signal interpolating between signal levels corresponding to two time-sequential pieces of the phase data, a reference-timing-signal output section which outputs a reference timing signal indicating the specific phase of the reference signal at a timing when the signal level of the voltage signal generated by the voltage signal generator crosses a preset setting voltage, and a reset section which resets the voltage signal generated by the voltage signal generator to the setting voltage. Accordingly, the noise performance of an output signal from the frequency synthesizer is improved.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: February 24, 2009
    Assignee: Nippon Precision Circuits Inc.
    Inventors: Kaoru Kanehachi, Akira Toyama
  • Publication number: 20060056565
    Abstract: A frequency synthesizer comprises a digital/analog converter which sequentially converts difference data of phase data indicating the phase of a reference signal to an analog value, a voltage signal generator which integrates the analog value converted by the digital/analog converter, thereby generating a voltage signal interpolating between signal levels corresponding to two time-sequential pieces of the phase data, a reference-timing-signal output section which outputs a reference timing signal indicating the specific phase of the reference signal at a timing when the signal level of the voltage signal generated by the voltage signal generator crosses a preset setting voltage, and a reset section which resets the voltage signal generated by the voltage signal generator to the setting voltage. Accordingly, the noise performance of an output signal from the frequency synthesizer is improved.
    Type: Application
    Filed: September 13, 2005
    Publication date: March 16, 2006
    Inventors: Kaoru Kanehachi, Akira Toyama
  • Patent number: 5442210
    Abstract: A semiconductor device has a DRAM portion forming a cache memory and a flash memory portion fabricated on a common substrate, fabricated by a process based on the process of fabricating the flash memory portion. An electrode layer common to capacitors of the DRAM portion and a floating gate layer of the flash memory portion are formed simultaneously from the same material. An electrode layer of the upper capacitor of the DRAM portion, a gate electrode layer for a transistor of the DRAM portion, and a control gate layer of the flash memory portion are formed simultaneously from the same material.
    Type: Grant
    Filed: October 28, 1993
    Date of Patent: August 15, 1995
    Assignee: Nippon Precision Circuits Inc.
    Inventor: Kaoru Kanehachi
  • Patent number: 5384274
    Abstract: A method of making a semiconductor device having formed thereon an inductor comprises a silicon substrate. A cut out region is obtained by removing a part of the silicon substrate in a hollow shape which may be a hollow cavity or a hollow cavity with an insulating material having a low complex permittivity such as silicon oxide buried therein. An insulator layer is formed on the cut out region and on the periphery thereof. A connection layer serves as one of the leads of the inductor and is formed using an electric conductive material such as a metal or doped polycrystalline silicon. A contact hole is provided in the interlayer insulation layer. A connection layer serves as an inductor and the other lead of the inductor, which is formed using an electric conductive material such as a metal. A protective insulator layer is also provided on the top of the structure.
    Type: Grant
    Filed: May 12, 1994
    Date of Patent: January 24, 1995
    Assignee: Nippon Precision Circuits Inc.
    Inventor: Kaoru Kanehachi