Patents by Inventor Kapil Vaswani

Kapil Vaswani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240160795
    Abstract: A peripheral device, for use with a host, comprises one or more compute elements a security module and at least one encryption unit. The security module is configured to form a trusted execution environment on the peripheral device for processing sensitive data using sensitive code. The sensitive data and sensitive code are provided by a trusted computing entity which is in communication with the host computing device. The at least one encryption unit is configured to encrypt and decrypt data transferred between the trusted execution environment and the trusted computing entity via the host computing device. The security module is configured to compute and send an attestation to the trusted computing entity to attest that the sensitive code is in the trusted execution environment.
    Type: Application
    Filed: January 22, 2024
    Publication date: May 16, 2024
    Inventors: Stavros VOLOS, David Thomas CHISNALL, Saurabh Mohan KULKARNI, Kapil VASWANI, Manuel COSTA, Samuel Alexander WEBSTER, Cédric Alain Marie FOURNET, Richard OSBORNE, Daniel John Pelham WILKINSON, Graham Bernard CUNNINGHAM
  • Publication number: 20240137210
    Abstract: A computer device instantiates a first Transport Layer Security (TLS) endpoint having access to a trusted execution environment (TEE) of the processor; generates in the TEE in an endpoint-specific public-private key pair bound to the first TLS endpoint; generates of attestation data verifying that the endpoint-specific public-private key pair was generated in the TEE and is bound to the first TLS endpoint; and signs the attestation data in the TEE using a TEE private key securely embedded in the processor. The device generates a TEE signature using an endpoint-specific private key of an endpoint-specific public-private key pair; and indicates of the attestation data, an endpoint-specific public key of the endpoint-specific public public-private key pair and the TEE signature to a second TLS endpoint within a TLS handshake message exchange between the first TLS endpoint and the second TLS endpoint.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 25, 2024
    Inventors: Kapil VASWANI, Siddharth JAYASHANKAR, Antoine DELIGNAT-LAVAUD, Cedric Alain Marie Christophe FOURNET
  • Patent number: 11966385
    Abstract: In various examples, there is provided a computer-implemented method for writing transaction log entries to a transaction log for a database system. At least part of the database system is configured to be executed within a trusted execution environment. The transaction log is stored outside of the trusted execution environment. The method maintains a first secure count representing a number of transaction log entries which have been written to the transaction log for transactions which have been committed to the database and writes a transaction log entry to the transaction log. In other examples, there is also provided is a computer-implemented method for restoring a database system using transaction log entries received from the transaction log and a current value of the first secure count.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: April 23, 2024
    Assignee: Microsoft Technology Licensing, LLC.
    Inventors: Christian Priebe, Kapil Vaswani, Manuel Silverio da Silva Costa
  • Publication number: 20240104193
    Abstract: Methods, systems, and computer program products for direct assignment of physical devices to confidential virtual machines (VMs). At a first guest privilege context of a guest partition, a direct assignment of a physical device associated with a host computer system to the guest partition is identified. The guest partition includes the first guest privilege context and a second guest privilege context, which is restricted from accessing memory associated with the first guest privilege context. The guest partition corresponds to a confidential VM, such that a memory region associated with the guest partition is inaccessible to a host operating system. It is determined, based on a policy, that the physical device is allowed to be directly assigned to the guest partition. Communication between the physical device and the second guest privilege context is permitted, such as by exposing the physical device on a virtual bus and/or forwarding an interrupt.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Inventors: Jin LIN, Jason Stewart WOHLGEMUTH, Michael Bishop EBERSOL, Aditya BHANDARI, Steven Adrian WEST, Emily Cara CLEMENS, Michael Halstead KELLEY, Dexuan CUI, Attilio MAINETTI, Sarah Elizabeth STEPHENSON, Carolina Cecilia PEREZ-VARGAS, Antoine Jean Denis DELIGNAT-LAVAUD, Kapil VASWANI, Alexander Daniel GREST, Steve Michel PRONOVOST, David Alan HEPKIN
  • Publication number: 20240086542
    Abstract: In various examples there is a computing device comprising: a first microcontroller comprising a first immutable bootloader and first mutable firmware. The first immutable bootloader uses a unique device secret burnt into hardware of the computing device in order to generate an attestation of the first mutable firmware. The computing device has a second microcontroller. There is second mutable firmware at the second microcontroller. There is a second immutable bootloader at the second microcontroller which sends a measurement of the second mutable firmware to the first immutable bootloader whenever the second microcontroller restarts, such that the first microcontroller is able to include the measurement in the attestation.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 14, 2024
    Inventors: Stavros VOLOS, Colin DOAK, Simon Douglas CHAMBERS, David RUGGLES, Richard NEAL, Cedric Alain Marie FOURNET, Kapil VASWANI, Balaji VEMBU
  • Patent number: 11921911
    Abstract: A peripheral device, for use with a host, comprises one or more compute elements a security module and at least one encryption unit. The security module is configured to form a trusted execution environment on the peripheral device for processing sensitive data using sensitive code. The sensitive data and sensitive code are provided by a trusted computing entity which is in communication with the host computing device. The at least one encryption unit is configured to encrypt and decrypt data transferred between the trusted execution environment and the trusted computing entity via the host computing device. The security module is configured to compute and send an attestation to the trusted computing entity to attest that the sensitive code is in the trusted execution environment.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: March 5, 2024
    Assignee: Microsoft Technology Licensing, LLC.
    Inventors: Stavros Volos, David Thomas Chisnall, Saurabh Mohan Kulkarni, Kapil Vaswani, Manuel Costa, Samuel Alexander Webster, Cédric Alain Marie Fournet, Richard Osborne, Daniel John Pelham Wilkinson, Graham Bernard Cunningham
  • Publication number: 20240045997
    Abstract: A peripheral device package for use in a host computing device has a plurality of compute elements and a plurality of resources shared by the plurality of compute elements. A datastructure is stored in a hidden memory of the peripheral device package. The data structure holds metadata about ownership of resources of the peripheral device package by a plurality of user runtime processes of the host computing device which use the compute elements. At least one of the user runtime processes is a secure user runtime process. The peripheral device package has a command processor configured to use the datastructure to enforce isolation of the resources used by the secure user runtime process.
    Type: Application
    Filed: October 6, 2023
    Publication date: February 8, 2024
    Inventors: Stavros VOLOS, Kapil Vaswani
  • Patent number: 11853429
    Abstract: In various examples there is a computing device comprising: a first microcontroller comprising a first immutable bootloader and first mutable firmware. The first immutable bootloader uses a unique device secret burnt into hardware of the computing device in order to generate an attestation of the first mutable firmware. The computing device has a second microcontroller. There is second mutable firmware at the second microcontroller. There is a second immutable bootloader at the second microcontroller which sends a measurement of the second mutable firmware to the first immutable bootloader whenever the second microcontroller restarts, such that the first microcontroller is able to include the measurement in the attestation.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: December 26, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Stavros Volos, Colin Doak, Simon Douglas Chambers, David Ruggles, Richard Neal, Cédric Alain Marie Fournet, Kapil Vaswani, Balaji Vembu
  • Patent number: 11836276
    Abstract: A peripheral device package for use in a host computing device has a plurality of compute elements and a plurality of resources shared by the plurality of compute elements. A datastructure is stored in a hidden memory of the peripheral device package. The data structure holds metadata about ownership of resources of the peripheral device package by a plurality of user runtime processes of the host computing device which use the compute elements. At least one of the user runtime processes is a secure user runtime process. The peripheral device package has a command processor configured to use the datastructure to enforce isolation of the resources used by the secure user runtime process.
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: December 5, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Stavros Volos, Kapil Vaswani
  • Publication number: 20230342121
    Abstract: A processing system comprising one or more chips, each comprising a plurality of tiles is described. Each tile comprises a respective processing unit and memory, the memory storing a codelet. The processing system has at least one encryption unit configured to encrypt and decrypt data transferred between the tiles and a trusted computing entity via an external computing device. The codelets are configured to instruct the tiles to transfer the encrypted data by reading from and writing to a plurality of memory regions at the external memory such that a plurality of streams of encrypted data are formed, each stream using an individual one of the memory regions at the external computing device.
    Type: Application
    Filed: July 13, 2021
    Publication date: October 26, 2023
    Inventors: Daniel John Pelham WILKINSON, Richard OSBORNE, Graham Bernard CUNNINGHAM, Kenneth GORDON, Samuel Alexander WEBSTER, Stavros VOLOS, Kapil VASWANI, Balaji VEMBU, Cédric Alain Marie FOURNET
  • Patent number: 11651090
    Abstract: A method for securely terminating a distributed trusted execution environment (TEE) spanning a plurality of work accelerators. After wiping sensitive data from the memory of its accelerator, a root of trust for each accelerator is configured to receive confirmation that the data has been wiped from the processor memory in relevant other accelerators prior to moving on to the next stage at which the TEE on its associated accelerator is terminated. Since the data has been wiped from the other accelerators, even if a third party were to inject malicious code into the accelerator, they would be unable to read out the secret data from the other accelerators since the data has been wiped from those other accelerators. In this way, a mechanism is provided for ensuring that when the distributed TEE is terminated, malicious third parties are unable to read out confidential data from the accelerators.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: May 16, 2023
    Assignee: GRAPHCORE LTD.
    Inventors: Daniel John Pelham Wilkinson, Stavros Volos, Kapil Vaswani, Balaji Vembu
  • Patent number: 11651089
    Abstract: A method for securely terminating a distributed trusted execution environment spanning a plurality of work accelerators. Each accelerator is configured to self-isolate upon determining that the distributed TEE is to be terminated across the system of accelerators. The data is also wiped from the processor memory of each accelerator, such that the data cannot be read out from the processor memory once the accelerator's links are re-enabled. The self-isolation is performed on each accelerator prior to the step of terminating the TEE on that accelerator. An accelerator only re-enables its links to other accelerators once the data is wiped from its processor memory such that the secret data is removed from the accelerator memory.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: May 16, 2023
    Assignee: GRAPHCORE LTD.
    Inventors: Daniel John Pelham Wilkinson, Stavros Volos, Kapil Vaswani, Balaji Vembu
  • Publication number: 20230073426
    Abstract: A peripheral device package for use in a host computing device has a plurality of compute elements and a plurality of resources shared by the plurality of compute elements. A datastructure is stored in a hidden memory of the peripheral device package. The data structure holds metadata about ownership of resources of the peripheral device package by a plurality of user runtime processes of the host computing device which use the compute elements. At least one of the user runtime processes is a secure user runtime process. The peripheral device package has a command processor configured to use the datastructure to enforce isolation of the resources used by the secure user runtime process.
    Type: Application
    Filed: August 29, 2022
    Publication date: March 9, 2023
    Inventors: Stavros Volos, Kapil Vaswani
  • Publication number: 20230020838
    Abstract: In various examples there is a computing device comprising: a first microcontroller comprising a first immutable bootloader and first mutable firmware. The first immutable bootloader uses a unique device secret burnt into hardware of the computing device in order to generate an attestation of the first mutable firmware. The computing device has a second microcontroller. There is second mutable firmware at the second microcontroller. There is a second immutable bootloader at the second microcontroller which sends a measurement of the second mutable firmware to the first immutable bootloader whenever the second microcontroller restarts, such that the first microcontroller is able to include the measurement in the attestation.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 19, 2023
    Inventors: Stavros VOLOS, Colin DOAK, Simon Douglas CHAMBERS, David RUGGLES, Richard NEAL, Cédric Alain Marie FOURNET, Kapil VASWANI, Balaji VEMBU
  • Publication number: 20230014066
    Abstract: A method for securely terminating a distributed trusted execution environment (TEE) spanning a plurality of work accelerators. After wiping sensitive data from the memory of its accelerator, a root of trust for each accelerator is configured to receive confirmation that the data has been wiped from the processor memory in relevant other accelerators prior to moving on to the next stage at which the TEE on its associated accelerator is terminated. Since the data has been wiped from the other accelerators, even if a third party were to inject malicious code into the accelerator, they would be unable to read out the secret data from the other accelerators since the data has been wiped from those other accelerators. In this way, a mechanism is provided for ensuring that when the distributed TEE is terminated, malicious third parties are unable to read out confidential data from the accelerators.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 19, 2023
    Inventors: Daniel John Pelham Wilkinson, Stavros Volos, Kapil Vaswani, Balaji Vembu
  • Publication number: 20230020255
    Abstract: A method for securely terminating a distributed trusted execution environment spanning a plurality of work accelerators. Each accelerator is configured to self-isolate upon determining that the distributed TEE is to be terminated across the system of accelerators. The data is also wiped from the processor memory of each accelerator, such that the data cannot be read out from the processor memory once the accelerator's links are re-enabled. The self-isolation is performed on each accelerator prior to the step of terminating the TEE on that accelerator. An accelerator only re-enables its links to other accelerators once the data is wiped from its processor memory such that the secret data is removed from the accelerator memory.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 19, 2023
    Inventors: Daniel John Pelham WILKINSON, Stavros VOLOS, Kapil VASWANI, Balaji VEMBU
  • Patent number: 11526613
    Abstract: A computer system has a separation mechanism which enforces separation between at least two execution environments such that one execution environment is a gatekeeper which interposes on all communications of the other execution environment. The computer system has an attestation mechanism which enables the gatekeeper to attest to properties of the at least two execution environments. A first one of the execution environments runs application specific code which may contain security vulnerabilities. The gatekeeper is configured to enforce an input output policy on the first execution environment by interposing on all communication to and from the first execution environment by forwarding, modifying or dropping individual ones of the communications according to the policy. The gatekeeper provides evidence of attestation both for the application specific code and the policy.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: December 13, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: David Thomas Chisnall, Cédric Alain Marie Fournet, Manuel Costa, Samuel Alexander Webster, Sylvan Clebsch, Kapil Vaswani
  • Patent number: 11443072
    Abstract: A peripheral device package for use in a host computing device has a plurality of compute elements and a plurality of resources shared by the plurality of compute elements. A datastructure is stored in a hidden memory of the peripheral device package. The data structure holds metadata about ownership of resources of the peripheral device package by a plurality of user runtime processes of the host computing device which use the compute elements. At least one of the user runtime processes is a secure user runtime process. The peripheral device package has a command processor configured to use the datastructure to enforce isolation of the resources used by the secure user runtime process.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: September 13, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Stavros Volos, Kapil Vaswani
  • Publication number: 20220222348
    Abstract: In various examples there is a method of enabling an attestable update of a firmware layer that provides a unique identity of a computing device. The method comprises using an immutable firmware layer to access a unique device secret. The immutable layer is used to derive a hardware device identity (HDI) from the unique device secret. The immutable layer is used to derive a compound device identity (CDI) from a measurement of the firmware layer and the unique device secret. The CDI and HDI are made available to the firmware layer. The firmware layer is used to issue a local certificate to endorse a device identity key, derived from the CDI, the local certificate signed by a key derived from the HDI.
    Type: Application
    Filed: January 13, 2021
    Publication date: July 14, 2022
    Inventors: Kapil VASWANI, Cédric Alain Marie FOURNET, Stavros VOLOS
  • Publication number: 20220019700
    Abstract: A system and method for encrypting and decrypting data exchanged between a multi-tile processing unit and a storage, where a plurality of keys are used for the encryption. Each of the plurality of keys is associated with a different one or more sets of the processors. Encryption hardware is configured to select a key to use for encryption/decryption operations in dependence upon the set of tiles associated with the data being exchanged. Each write request from a tile contains identifier bits associated with that tile's set of tiles, enabling the encryption hardware to select the key to use for encrypting the data in the write request. Each read completion for a tile contains identifier bits associated with that tile's set of tiles, enabling the encryption hardware to select the key to use for decrypting the data in the read completion.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 20, 2022
    Inventors: Daniel John Pelham WILKINSON, Graham Bernard CUNNINGHAM, Stavros VOLOS, Kapil VASWANI, Cedric Alain Marie FOURNET, Balaji VEMBU