Abstract: A system, method and processor that mitigates security vulnerabilities using context-dependent address space hiding. In some embodiments, a hardware mechanism allows a more-privileged software component managing multiple less-privileged software components to blind itself against “out-of-context” less-privileged software components. The hardware mechanism can allow the more-privileged software component to dynamically hide a portion of the more-privileged address space related to the “out-of-context” less-privileged software components, based on knowledge of the “in-context” less-privileged software component. A context register is set with a value from which an address range, within the address space of the more-privileged software component, can be determined, where the address range is associated with a first less-privileged software component can be determined.

Abstract: A first set of instructions, which is provided access to a first address space, is scheduled for execution at a first hardware thread of a processor. Prior to executing an instruction of a second set of instructions, which accesses a second address space, at the first hardware thread, a determination is made that the second address space is accessible from a second hardware thread of the processor.

Abstract: A first set of instructions, which is provided access to a first address space, is scheduled for execution at a first hardware thread of a processor. Prior to executing an instruction of a second set of instructions, which accesses a second address space, at the first hardware thread, a determination is made that the second address space is accessible from a second hardware thread of the processor.

Abstract: An opportunistic hypervisor determines that a guest virtual machine of a virtualization host has voluntarily released control of a physical processor. The hypervisor uses the released processor to identify and initiate a virtualization management task which has not been completed. In response to determining that at least a portion of the task has been performed, the hypervisor enters a quiescent state, releasing the physical processor to enable resumption of the guest virtual machine.

Abstract: An interrupt recovery manager detects that a compute instance has exited a state in which interrupts from one or more interrupt sources were not processed at the compute instance. The recovery manager identifies a source from which interrupts may have been missed by the compute instance, and causes an indication of a potential missed interrupt from that source to be delivered to the compute instance.

Abstract: An offloaded virtualization management component of a virtualization host receives an indication from a hypervisor of a portion of main memory of the host for which memory allocation decisions are not to be performed by the hypervisor. The offloaded virtualization management component assigns a subset of the portion to a particular guest virtual machine and provides an indication of the subset to the hypervisor.

Abstract: An offloaded virtualization management component of a virtualization host receives an indication from a hypervisor of a portion of main memory of the host for which memory allocation decisions are not to be performed by the hypervisor. The offloaded virtualization management component assigns a subset of the portion to a particular guest virtual machine and provides an indication of the subset to the hypervisor.

Abstract: An offloaded virtualization management component of a virtualization host receives an indication from a hypervisor of a portion of main memory of the host for which memory allocation decisions are not to be performed by the hypervisor. The offloaded virtualization management component assigns a subset of the portion to a particular guest virtual machine and provides an indication of the subset to the hypervisor.

Abstract: An opportunistic hypervisor determines that a guest virtual machine of a virtualization host has voluntarily released control of a physical processor. The hypervisor uses the released processor to identify and initiate a virtualization management task which has not been completed. In response to determining that at least a portion of the task has been performed, the hypervisor enters a quiescent state, releasing the physical processor to enable resumption of the guest virtual machine.

Abstract: An opportunistic hypervisor determines that a guest virtual machine of a virtualization host has voluntarily released control of a physical processor. The hypervisor uses the released processor to identify and initiate a virtualization management task which has not been completed. In response to determining that at least a portion of the task has been performed, the hypervisor enters a quiescent state, releasing the physical processor to enable resumption of the guest virtual machine.

Abstract: An opportunistic hypervisor determines that a guest virtual machine of a virtualization host has voluntarily released control of a physical processor. The hypervisor uses the released processor to identify and initiate a virtualization management task which has not been completed. In response to determining that at least a portion of the task has been performed, the hypervisor enters a quiescent state, releasing the physical processor to enable resumption of the guest virtual machine.

Abstract: An offloaded virtualization management component of a virtualization host receives an indication from a hypervisor of a portion of main memory of the host for which memory allocation decisions are not to be performed by the hypervisor. The offloaded virtualization management component assigns a subset of the portion to a particular guest virtual machine and provides an indication of the subset to the hypervisor.