Abstract: A multiple-layer circuit board has a signaling layer plane, an exterior layer plane, and a ground layer plane. A pair of differential signal lines implemented as strip-lines are within the signaling layer, and propagate electromagnetic interference (EMI) along the signaling layer. A dual slot common mode noise filter may be etched within the ground layer and may include a first U-shaped etching pair comprising a first U-shaped etching and a second U-shaped etching opposing the first U-shaped etching within the ground layer plane.

Abstract: A multiple-layer circuit board has a signaling layer plane, an exterior layer plane, and a ground layer plane. A pair of differential signal lines implemented as strip-lines are within the signaling layer, and propagate electromagnetic interference (EMI) along the signaling layer. A dual slot common mode noise filter may be etched within the ground layer and may include a first U-shaped etching pair comprising a first U-shaped etching and a second U-shaped etching opposing the first U-shaped etching within the ground layer plane.

Abstract: A method for routing vias in a multilayer substrate is disclosed. One embodiment of a method may comprise providing a multilayer substrate with an internal bond surface having a plurality of internal bond pads and an external bond surface with a plurality of external bond pads. A plurality of power vias and ground vias may be routed from a first redistribution layer between the internal bond surface and the external bond surface to a second redistribution layer between the first redistribution layer and the external bond surface based on a via pattern. The via pattern may comprise routing a power via and a ground via adjacent one another spaced apart at a distance that is substantially equal to a minimum routing pitch associated with the multilayer substrate.

Abstract: For a given channel and a filter having at least one filter tap, a set of at least one weight value is determined for the at least one filter tap according to which at least one weight value substantially minimizes a gradient of a frequency response for the given channel and substantially maximizes energy of the frequency response for the given channel within a predetermined bandwidth.

Abstract: System and methods of synchronizing reference frequencies are disclosed. In an exemplary implementation, a method may comprise providing separate reference frequencies for each of a plurality of operational components. The method may also comprise connecting the separate reference frequencies to one another in a modular, fault-tolerant circuit topology. The method may also comprise synchronizing the separate reference frequencies so that each of the operational components operate at the same frequency.

Abstract: Methods and apparatuses for affecting the frequency behavior of connections within a printed circuit board or an integrated circuit are disclosed. Some embodiments include a printed circuit board comprising, a plurality of conductive layers each comprising at least one conductive pad, where each conductive pad on the conductive layers includes a vacancy, and an insulating material disposed about the conductive layers such that the vacancies are at least partially filled with the insulating material.

Abstract: According to at least one embodiment, a method comprises generating a data file having design parameters for an electrical design, and with a computer-executable program, accessing the data file and populating a computer-aided design (CAD) program's database with the design parameters.

Abstract: A method for routing vias in a multilayer substrate is disclosed. One embodiment of a method may comprise providing a multilayer substrate with an internal bond surface having a plurality of internal bond pads and an external bond surface with a plurality of external bond pads. A plurality of power vias and ground vias may be routed from a first redistribution layer between the internal bond surface and the external bond surface to a second redistribution layer between the first redistribution layer and the external bond surface based on a via pattern. The via pattern may comprise routing a power via and a ground via adjacent one another spaced apart at a distance that is substantially equal to a minimum routing pitch associated with the multilayer substrate.

Abstract: A system and method can be utilized to determine S-parameters of a network. In one embodiment a system includes an S-parameter calculator that computes the S-parameters of the network based on waveform parameters determined from single port measurements. At least one of the single port measurements corresponds to measurements at one of the plural ports while a matched load is applied to at least another of the plural ports.

Abstract: Various embodiments of a system, apparatus and method for determining the signal coupling coefficient of a path in the design of a substrate are disclosed. One apparatus embodiment comprises a path signal coupling coefficient tool.

Abstract: Various embodiments of a system, apparatus and method for determining the signal coupling coefficient of a via in the design of a substrate are disclosed. One apparatus embodiment comprises a via signal coupling coefficient tool.

Abstract: A method for verifying coupling in a differential via pair group includes identifying a differential via pair group in a design database and identifying a victim differential via pair in the differential via pair group. All other differential via pairs in the differential via pair group are identified as culprit differential pairs. The differential via pair group includes at least one culprit differential via pair. The method also includes obtaining a total coupling threshold level and calculating a total coupling factor for the victim differential via pair within the differential via pair group. The method also includes flagging the victim differential via pair if the calculated total coupling factor exceeds the total coupling threshold level.

Abstract: A method for verifying coupling in a differential trace pair group includes reading victim properties of a victim differential trace pair and culprit properties of a plurality of culprit differential trace pairs from a circuit design database. The method also includes calculating a plurality of coupling factors based on the victim properties and the culprit properties, one from each of the plurality of culprit differential trace pairs to the victim differential trace pair. The method also includes calculating a total coupling factor for the victim differential trace pair based on the plurality of coupling factors, and flagging the victim differential trace pair if the total coupling factor exceeds a total coupling threshold level.

Abstract: A method for calculating worst case coupling for a differential pair group includes identifying a victim differential pair and at least one culprit differential pair in the differential pair group, calculating a coupling factor between each of the culprit differential pairs and the victim differential pair, and summing the absolute value of each of the coupling factors to generate a worst case coupling factor.

Abstract: Methodology, systems, and media associated with sensing a magnetic field produced by an electrical signal flowing through a conductor are described. One exemplary system may include a connector that conveys the electrical signal between conductors and an in-line field sensor positioned and configured to sense the magnetic field produced by the electrical signal without affecting the electrical signal.

Abstract: According to at least one embodiment, a system comprises logic for maintaining homogeneity between a model of an object designed in a computer-aided modeling system and corresponding parameter information for the model included in a model documentation file.

Abstract: A printed circuit board (PCB) substrate and method for construction of the same. In one embodiment, a first dielectric material is associated with a first current return layer and a second dielectric material is associated with a second current return layer. A signal path layer is interposed between the first dielectric material and the second dielectric material. An adhesive layer is interposed between the first dielectric material and the second dielectric material such that the adhesive layer is substantially coplanar relative to the signal path layer.

Abstract: A system and method for updating a library in a design database environment operable to be accessed by at least one design user. In one embodiment, a first engine associates an update file with appropriate design objects to generate an uncompiled update file in a trusted space environment. A second engine associated with the trusted space environment compiles the uncompiled update file into a compiled update file. A third engine transfers the compiled update file from the trusted space environment into the library in the design database environment.

Abstract: According to at least one embodiment, a method comprises generating a data file having design parameters for an electrical design, and with a computer-executable program, accessing the data file and populating a computer-aided design (CAD) program's database with the design parameters.

Abstract: A system for determining S-parameters of a network includes an S-parameter calculator that computes the S-parameters of the network based on waveform parameters determined through single port measurements at each of plural ports of the network.