Abstract: A cleaning composition and process for cleaning post-chemical mechanical polishing (CMP) residue and contaminants from a microelectronic device having said residue and contaminants thereon. The cleaning compositions include novel corrosion inhibitors. The composition achieves highly efficacious cleaning of the post-CMP residue and contaminant material from the surface of the microelectronic device without compromising the low-k dielectric material or the copper interconnect material.

Abstract: A cleaning composition and process for cleaning post-chemical mechanical polishing (CMP) residue and contaminants from a microelectronic device having said residue and contaminants thereon. The cleaning compositions include novel corrosion inhibitors. The composition achieves highly efficacious cleaning of the post-CMP residue and contaminant material from the surface of the microelectronic device without compromising the low-k dielectric material or the copper interconnect material.

Abstract: Compositions and methods of using said composition for removing polymeric materials from surfaces, preferably cleaning contaminant buildup from a lithography apparatus without total disassembly of said apparatus.

Abstract: Compositions and methods for substantially and efficiently removing NiPt (1-25%) material from microelectronic devices having same thereon. The compositions are substantially compatible with other materials present on the microelectronic device such as gate metal materials.

Abstract: A cleaning composition and process for cleaning post-chemical mechanical polishing (CMP) residue and contaminants from a microelectronic device having said residue and contaminants thereon. The cleaning compositions include at least one quaternary base, at least one amine, at least one corrosion inhibitor, and at least one solvent. The composition achieves highly efficacious cleaning of the post-CMP residue and contaminant material from the surface of the microelectronic device while being compatible with barrier layers.

Abstract: An aqueous solution of a cerium (IV) complex or salt having an extended lifetime is provided. In one embodiment, the extended lifetime is achieved by adding at least one booster additive to an aqueous solution of the cerium (IV) complex or salt. In another embodiment, the extended lifetime is achieved by providing an aqueous solution of a cerium (IV) complex or salt and a cerium (III) complex or salt. The cerium (III) complex or salt can be added or it can be generated in-situ by introducing a reducing agent into the aqueous solution of the cerium (IV) complex or salt. The aqueous solution can be used to remove a mask material, especially an ion implanted and patterned photoresist, from a surface of a semiconductor substrate.

Abstract: An aqueous solution of a cerium (IV) complex or salt having an extended lifetime is provided. In one embodiment, the extended lifetime is achieved by adding at least one booster additive to an aqueous solution of the cerium (IV) complex or salt. In another embodiment, the extended lifetime is achieved by providing an aqueous solution of a cerium (IV) complex or salt and a cerium (III) complex or salt. The cerium (III) complex or salt can be added or it can be generated in-situ by introducing a reducing agent into the aqueous solution of the cerium (IV) complex or salt. The aqueous solution can be used to remove a mask material, especially an ion implanted and patterned photoresist, from a surface of a semiconductor substrate.

Abstract: A cleaning composition and process for cleaning post-chemical mechanical polishing (CMP) residue and contaminants from a microelectronic device having said residue and contaminants thereon. The cleaning compositions include novel corrosion inhibitors. The composition achieves highly efficacious cleaning of the post-CMP residue and contaminant material from the surface of the microelectronic device without compromising the low-k dielectric material or the copper interconnect material.

Abstract: A chemical mechanical polishing process including a single copper removal CMP slurry formulation for planarization of a microelectronic device structure preferably having copper deposited thereon. The process includes the bulk removal of a copper layer using a first CMP slurry formulation having oxidizing agent, passivating agent, abrasive and solvent, and the soft polishing and over-polishing of the microelectronic device structure using a formulation including the first CMP slurry formulation and at least one additional additive. The CMP process described herein provides a high copper removal rate, a comparatively low barrier material removal rate, appropriate material selectivity ranges to minimize copper dishing at the onset of barrier material exposure, and good planarization efficiency.

Abstract: A method of passivating a CMP composition by dilution and determining the relationship between the extent of dilution and the static etch rate of copper. Such relationship may be used to control the CMP composition during the CMP polish to minimize the occurrence of dishing or other adverse planarization deficiencies in the polished copper, even in the presence of substantial levels of copper ions in the CMP composition and at the copper/CMP composition interface.

Abstract: Compositions and methods of using said composition for removing polymeric materials from surfaces, preferably cleaning contaminant buildup from a lithography apparatus without total disassembly of said apparatus.

Abstract: Chemical mechanical polishing (CMP) compositions and single CMP platen process for the removal of copper and barrier layer material from a microelectronic device substrate having same thereon. The process includes the in situ transformation of a copper removal CMP composition, which is used to selectively remove and planarize copper, into a barrier removal CMP composition, which is used to selectively remove barrier layer material, on a single CMP platen pad.

Abstract: The invention is to a reversible photobleachable material comprised of nanoparticles of indium gallium oxide or gallium oxide, and a method of exposing a substrate, such as in semiconductor manufacture, using same.

Abstract: Chemical mechanical polishing (CMP) compositions and single CMP platen process for the removal of copper and barrier layer material from a microelectronic device substrate having same thereon. The process includes the in situ transformation of a Step I slurry formulation, which is used to selectively remove and planarize copper, into a Step II slurry formulation, which is used to selectively remove barrier layer material, on a single CMP platen pad.

Abstract: A method of passivating a CMP composition by dilution and determining the relationship between the extent of dilution and the static etch rate of copper. Such relationship may be used to control the CMP composition during the CMP polish to minimize the occurrence of dishing or other adverse planarization deficiencies in the polished copper, even in the presence of substantial levels of copper ions in the CMP composition and at the copper/CMP composition interface.

Abstract: A chemical mechanical polishing process including a single copper removal CMP slurry formulation for planarization of a microelectronic device structure preferably having copper deposited thereon. The process includes the bulk removal of a copper layer using a first CMP slurry formulation having oxidizing agent, passivating agent, abrasive and solvent, and the soft polishing and over-polishing of the microelectronic device structure using a formulation including the first CMP slurry formulation and at least one additional additive. The CMP process described herein provides a high copper removal rate, a comparatively low barrier material removal rate, appropriate material selectivity ranges to minimize copper dishing at the onset of barrier material exposure, and good planarization efficiency.

Abstract: A CMP composition containing 5-aminotetrazole, e.g., in combination with oxidizing agent, chelating agent, abrasive and solvent and a method of use. Such CMP composition may be diluted during the CMP polish to minimize the occurrence of dishing or other adverse planarization deficiencies in the polished copper, even in the presence of substantial levels of copper ions in the CMP composition and at the copper/CMP composition interface during CMP processing.

Abstract: A method and structure polishes and cleans silicon wafers by mixing a marker with a slurry to form a slurry mixture, performs chemical mechanical polishing on a silicon wafer using the slurry mixture, rinses the slurry mixture from the silicon wafer, checks the silicon wafer for marker residue, and repeats the rinsing process if the checking process detects the marker residue on the wafer.

Abstract: A method and structure polishes and cleans silicon wafers by mixing a marker with a slurry to form a slurry mixture, performs chemical mechanical polishing on a silicon wafer using the slurry mixture, rinses the slurry mixture from the silicon wafer, checks the silicon wafer for marker residue, and repeats the rinsing process if the checking process detects the marker residue on the wafer.

Abstract: A chemical-mechanical polishing (CMP) control system controls distribution of pressure across the backside of a semiconductor wafer being polished. The system includes a CMP apparatus having a carrier for supporting a semiconductor wafer. The carrier includes a plurality of dual function piezoelectric actuators. The actuators sense pressure variations across the semiconductor wafer and are individually controllable. A control is connected to the actuators for monitoring sensed pressure variations and controlling the actuators to provide a controlled pressure distribution across the semiconductor wafer.