Patents by Inventor Karl J. Puttlitz

Karl J. Puttlitz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5130779
    Abstract: The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.
    Type: Grant
    Filed: June 19, 1990
    Date of Patent: July 14, 1992
    Assignee: International Business Machines Corporation
    Inventors: Birendra N. Agarwala, Aziz M. Ahsan, Arthur Bross, Mark F. Chadurjian, Nicholas G. Koopman, Li-Chung Lee, Karl J. Puttlitz, Sudipta K. Ray, James G. Ryan, Joseph G. Schaefer, Kamalesh K. Srivastava, Paul A. Totta, Erick G. Walton, Adolf E. Wirsing
  • Patent number: 4604644
    Abstract: An improved solder interconnection for forming I/O connections between an integrated semiconductor device and a support substrate having a plurality of solder connections arranged in an area array joining a set of I/O's on a flat surface of the semiconductor device to a corresponding set of solder wettable pads on a substrate, the improvement being a band of dielectric organic material disposed between and bonded to the device and substrate embedding at least an outer row of solder connections leaving the center inner solder connections and the adjacent top and bottom surfaces free of dielectric material.
    Type: Grant
    Filed: January 28, 1985
    Date of Patent: August 5, 1986
    Assignee: International Business Machines Corporation
    Inventors: Keith F. Beckham, Anne E. Kolman, Kathleen M. McGuire, Karl J. Puttlitz, Horatio Quinones
  • Patent number: 4160893
    Abstract: An individual chip joining machine is designed primarily to bond a single chip to a multi-chip substrate. The machine includes an X-Y table for moving a substrate to locate a chip site beneath a probe. The probe serves to pick up a chip and either place it on the substrate or remove it therefrom and further serves to heat the chip to join it to the substrate by solder reflow or to melt the solder and allow the chip to be removed. The probe is mounted on a Z direction placement mechanism that also includes means to allow the probe to be backed off a fixed distance from a chip, once the chip has been placed on the substrate preparatory to joining thereto. A second heater heats the substrate to a bias temperature, this heating being controlled through use of a surrogate substrate having a thermocouple attached thereto.
    Type: Grant
    Filed: December 29, 1977
    Date of Patent: July 10, 1979
    Assignee: International Business Machines Corporation
    Inventors: Robert H. Meyen, Karl J. Puttlitz, Karl Schink, Herbert Wenskus