Abstract: A phase-locked system for recovering data from a disk drive includes a phase detector for signalling the difference in phase between incoming delayed data pulses and a phase detection window clock signal. The phase detection window clock signal is derived from one output of an integrated-circuit window generator, driven by the output of a voltage-controlled oscillator whose frequency is controlled by the phase detector. The phase-locked loop is completed by comparing the phase detection window clock signal output of the window generator with the incoming delayed data pulses in the phase detector. Data detection window clock pulses, defining time windows in which the delayed data pulses are exactly centered, are produced at a second output of the window generator which has a line about which it is essentially symmetric, resulting in the two outputs of the window generator being exactly 180.degree. apart in phase from each other.

Abstract: A circuit for providing precise delays includes a phase-locked loop driven by a reference frequency source such as a crystal oscillator and including a variable delay circuit. The output of the oscillator is applied to the delay circuit and the non-delayed and delayed signals are compared in a phase comparator. An error signal representative of phase error is developed and applied to vary the amount of delay until the phase error is eliminated. A precise delay referenced to the oscillator frequency is therefore achieved.

Abstract: An integrated circuit chip is fabricated with an operational active device and a nearly-identical, exemplary active device. The exemplary device is connected in series with a current reference element so that current flow through the reference element will be substantially duplicated in the exemplary device. A difference amplifier senses the output voltage of the exemplary device; compares it to a provided reference voltage; and generates a gate biasing level at the gate of the exemplary device to force the output voltage of the exemplary device substantially equal to the reference voltage. The biasing level at the gate of the exemplary device is duplicated at the gate of the operational device thereby creating a condition wherein the output current of the operational device will be a substantially precise replica of the current flow through the reference element when the reference voltage is duplicated across the output of the operational device.

Abstract: An integrated system for use in a disk drive system for the implementation of write precompensation for recording of data and read window margining for accelerated testing of the disk drive. Both functions are provided by a common delay-line circuitry. The output of the delay line circuit is applied to both window shifting and write precompensation. An on-board read detection error analysis can be performed after installation of the drive in a computer system in its final configuration. Actual read error tolerance based on the overall system in its actual operating condition can thus be obtained. Enhanced data recovery techniques are also facilitated.

Abstract: A flip-flop circuit is provided for use in a phase-locked loop circuit, the flip-flop having two signal paths for selecting a VCO output during velocity lock and phase lock. The two signal paths comprise identical environments and therefore eliminate the phase step exhibited by prior art designs in shifting between velocity lock and phase lock. The circuit is also useful in any application where a clock to output delay of a flip-flop connected for normal operation, must have its propagation delay matched to a circuit which simply delays a signal by the same amount.

Abstract: A voltage controlled oscillator includes an inverting amplifier connected to a resonant feedback network and a comparator for comparing the input to the inverting amplifier to a reference voltage which is equal to the threshold voltage of the inverting amplifier. As a result, the oscillator provides a square wave output having a precise one-to-one duty cycle. In addition, circuitry is included for causing the oscillator to start up at a steady state value and predetermined phase.

Abstract: The present invention provides a circuit which facilitates fast and reliable start-up of an oscillator crystal without the amplification of undesirable frequencies of noise. A crystal is provided which is connected in parallel to an amplifying inverter having an input and an output. Grounded capacitors are connected respectively to the input and output of the inverter for stability. A first high resistance feedback path and a second low resistance feedback path are provided between the output of the inverter and the input of the inverter. A switch is also provided for selectively engaging or disengaging the low resistance feedback path with the inverter at preselected points in time. During operation of the circuit in the preferred manner, the switch engages the low resistance feedback path with the inverter to allow maximum charge build-up at the stabilizing capacitors upon turn-on of a supply voltage, thus quickly generating a large input voltage at the inverter.

Abstract: A voltage controlled oscillator includes automatic adjust circuitry to achieve and maintain desired operating characteristics such that for a predetermined output frequency the oscillator will have a predetermined input voltage. The oscillator may advantageously be incorporated into a phase locked loop circuit. The phase locked loop will lock onto the frequency of an input signal. Automatic adjust circuitry monitors the input to the voltage controlled oscillator in the phase locked loop and varies the amount of a bias voltage applied to the oscillator so that the input voltage to the oscillator will change until it reaches the desired level. The provision of the automatic adjust circuitry enables the desired operating characteristics of the oscillator to be maintained in spite of long term changes in the circuit operation.