Abstract: A FMCW radar receiver includes a LO providing a chirped LO signal, an in-phase (I) channel for outputting I-data and a quadrature (Q) channel for outputting Q-data. A dynamic correction parameter generator generates IQ phase correction values (P[n]s) and IQ gain correction values (G[n]s) based on a frequency slope rate of the chirped LO signal for generating during intervals of chirps including a first sequence of P[n]s and G[n]s during a first chirp and a second sequence of P[n]s and G[n]s during a second chirp. An IQ mismatch (IQMM) correction circuit has a first IQMM input coupled to receive the I-data and a second IQMM input receiving the Q-data, and the P[n]s and G[n]s. During the first chirp the IQMM correction circuit provides first Q?-data and first I?-data and during the second chirp the IQMM correction circuit provides at least second Q?-data and second I?-data.

Abstract: Methods for monitoring of performance parameters of one or more receive channels and/or one or more transmit channels of a radar system-on-a-chip (SOC) are provided. The radar SOC may include a loopback path coupling at least one transmit channel to at least one receive channel to provide a test signal from the at least one transmit channel to the at least one receive channel when the radar SOC is operated in test mode. In some embodiments, the loopback path includes a combiner coupled to each of one or more transmit channels, a splitter coupled to each of one or more receive channels, and a single wire coupling an output of the combiner to an input of the splitter.

Abstract: A frequency modulated continuous wave (FMCW) radar system is provided that includes a receiver configured to generate a digital intermediate frequency (IF) signal, and an interference monitoring component coupled to the receiver to receive the digital IF signal, in which the interference monitoring component is configured to monitor at least one sub-band in the digital IF signal for interference, in which the at least one sub-band does not include a radar signal.

Abstract: The disclosure provides a radar apparatus for estimating a range of an obstacle. The radar apparatus includes a local oscillator that generates a first ramp segment and a second ramp segment. The first ramp segment and the second ramp segment each includes a start frequency, a first frequency and a second frequency. The first frequency of the second ramp segment is equal to or greater than the second frequency of the first ramp segment when a slope of the first ramp segment and a slope of the second ramp segment are equal and positive. The first frequency of the second ramp segment is equal to or less than the second frequency of the first ramp segment when the slope of the first ramp segment and the slope of the second ramp segment are equal and negative.

Abstract: The disclosure provides a radar apparatus. The radar apparatus includes a transmitter that transmits a first chirp. The first chirp is scattered by one or more obstacles to generate a first plurality of scattered signals. A plurality of receivers receives the first plurality of scattered signals. Each receiver of the plurality of receivers generates a digital signal in response to a scattered signal of the first plurality of scattered signals. A processor is coupled to the plurality of receivers and receives the digital signals from the plurality of receivers. The processor performs range FFT (fast fourier transform) and angle FFT on the digital signals received from the plurality of receivers to generate a first matrix of complex samples.

Abstract: A FMCW radar receiver includes a LO providing a chirped LO signal, an in-phase (I) channel for outputting I-data and a quadrature (Q) channel for outputting Q-data. A dynamic correction parameter generator generates IQ phase correction values (P[n]s) and IQ gain correction values (G[n]s) based on a frequency slope rate of the chirped LO signal for generating during intervals of chirps including a first sequence of P[n]s and G[n]s during a first chirp and a second sequence of P[n]s and G[n]s during a second chirp. An IQ mismatch (IQMM) correction circuit has a first IQMM input coupled to receive the I-data and a second IQMM input receiving the Q-data, and the P[n]s and G[n]s. During the first chirp the IQMM correction circuit provides first Q?-data and first I?-data and during the second chirp the IQMM correction circuit provides at least second Q?-data and second I?-data.

Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.

Abstract: Systems and methods are provided for packet detection in a wireless local area network transceiver. An antenna is configured to receive a signal, having a carrier frequency. A mixer is configured to mix the received signal with one of the in-phase and quadrature components of the local oscillator to produce a corresponding one of an in-phase downconverted signal and a quadrature phase downconverted signal. A packet detector is configured to determine, from the one of the in-phase downconverted signal and the quadrature phase downconverted signal, if the signal contains a packet of data and instruct a set of components associated with an other of the in-phase and quadrature components of the local oscillator to activate to process the received signal.

Abstract: The disclosure provides a radar apparatus for estimating a range of an obstacle. The radar apparatus includes a local oscillator that generates a first ramp segment and a second ramp segment. The first ramp segment and the second ramp segment each includes a start frequency, a first frequency and a second frequency. The first frequency of the second ramp segment is equal to or greater than the second frequency of the first ramp segment when a slope of the first ramp segment and a slope of the second ramp segment are equal and positive. The first frequency of the second ramp segment is equal to or less than the second frequency of the first ramp segment when the slope of the first ramp segment and the slope of the second ramp segment are equal and negative.

Abstract: The disclosure provides a radar apparatus. The radar apparatus includes a transmitter that transmits a first chirp. The first chirp is scattered by one or more obstacles to generate a first plurality of scattered signals. A plurality of receivers receives the first plurality of scattered signals. Each receiver of the plurality of receivers generates a digital signal in response to a scattered signal of the first plurality of scattered signals. A processor is coupled to the plurality of receivers and receives the digital signals from the plurality of receivers. The processor performs range FFT (fast fourier transform) and angle FFT on the digital signals received from the plurality of receivers to generate a first matrix of complex samples.

Abstract: A frequency modulated continuous wave (FMCW) radar system is provided that includes a receiver configured to generate a digital intermediate frequency (IF) signal, and an interference monitoring component coupled to the receiver to receive the digital IF signal, in which the interference monitoring component is configured to monitor at least one sub-band in the digital IF signal for interference, in which the at least one sub-band does not include a radar signal.

Abstract: A radar device is provided that includes a timing control component operable to generate, for each chirp of a sequence of chirps according to a set of chirp configuration parameters and a chirp profile for the chirp, chirp control signals to cause the radar device to transmit the chirp, the timing control component having chirp configuration parameter inputs, chirp profile parameter inputs, a chirp address output, and chirp control signal outputs, a chirp configuration storage component having chirp configuration parameter outputs coupled to corresponding inputs of the configuration parameter inputs of the timing control component, a chirp profile address output, and a chirp address input coupled to the chirp address output, and a chirp profile storage component having chirp profile parameter outputs coupled to the chirp profile parameter inputs of the timing control component; and a chirp profile address input coupled to the chirp profile address output.

Abstract: A radar system is provided that includes a radar transceiver integrated circuit (IC) configurable to transmit a first frame of chirps, and another radar transceiver IC configurable to transmit a second frame of chirps at a time delay ?T, wherein ?T=Tc/K, K?2 and Tc is an elapsed time from a start of one chirp in the first frame and the second frame and a start of a next chirp in the first frame and the second frame, wherein the radar system is configured to determine a velocity of an object in a field of view of the radar system based on first digital intermediate frequency signals generated responsive to receiving reflected chirps of the first frame and second digital IF signals generated responsive to receiving reflected chirps of the time delayed second frame, wherein the maximum measurable velocity is increased by a factor of K.

Abstract: A FMCW radar system with a built-in self-test (BIST) system for monitoring includes a receiver, a transmitter, and a frequency synthesizer. A FMCW chirp timing engine controls timing of operations at least one radar component. The BIST system includes at least one switchable coupling for coupling a first plurality of different analog signals including from a first plurality of selected nodes in the receiver or transmitter that are all coupled to a second number of monitor analog-to-digital converters (ADCs). The second number is less than (<) the first plurality of different analog signals. The BIST system includes a monitor timing engine and controller operating synchronously with the chirp timing engine, that includes a software configurable monitoring architecture for generating control signals including for selecting using the switchable coupling which analog signal to forward to the monitor ADC and when the monitor ADC samples the analog signals.

Abstract: A radar device is provided that includes a timing control component operable to generate, for each chirp of a sequence of chirps according to a set of chirp configuration parameters and a chirp profile for the chirp, chirp control signals to cause the radar device to transmit the chirp, the timing control component having chirp configuration parameter inputs, chirp profile parameter inputs, a chirp address output, and chirp control signal outputs, a chirp configuration storage component having chirp configuration parameter outputs coupled to corresponding inputs of the configuration parameter inputs of the timing control component, a chirp profile address output, and a chirp address input coupled to the chirp address output, and a chirp profile storage component having chirp profile parameter outputs coupled to the chirp profile parameter inputs of the timing control component; and a chirp profile address input coupled to the chirp profile address output.

Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.

Abstract: A radar system is provided that includes a receive channel including a complex baseband and a processor coupled to the receive channel to receive a first plurality of digital intermediate frequency (IF) samples from an in-band (I) channel of the complex baseband and a corresponding second plurality of digital IF samples from a quadrature (Q) channel of the complex baseband, wherein the processor is configured to execute instructions to compute at least one failure metric based on the first plurality of digital IF samples and the second plurality of digital IF samples.

Abstract: The disclosure provides a radar apparatus for estimating a position and a velocity of a plurality of obstacles. The radar apparatus includes a slave radar chip. A master radar chip is coupled to the slave radar chip. The master radar chip includes a local oscillator that generates a transmit signal. The slave radar chip receives the transmit signal on a first path and sends the transmit signal back to the master radar chip on a second path. A delay detect circuit is coupled to the local oscillator and receives the transmit signal from the slave radar chip on the second path and the transmit signal from the local oscillator. The delay detect circuit estimates a routing delay from the transmit signal received from the slave radar chip on the second path and from the transmit signal received from the local oscillator.

Abstract: A radar hardware accelerator (HWA) includes a fast Fourier transform (FFT) engine including a pre-processing block for providing interference mitigation and/or multiplying a radar data sample stream received from ADC buffers within a split accelerator local memory that also includes output buffers by a pre-programmed complex scalar or a specified sample from an internal look-up table (LUT) to generate pre-processed samples. A windowing plus FFT block (windowed FFT block) is for multiply the pre-processed samples by a window vector and then processing by an FFT block for performing a FFT to generate Fourier transformed samples. A post-processing block is for computing a magnitude of the Fourier transformed samples and performing a data compression operation for generating post-processed radar data. The pre-processing block, windowed FFT block and post-processing block are connected in one streaming series data path.

Abstract: A device includes a circuit board having thereon, a controlling component, a first radar chip and a second radar chip. The first radar chip includes a first radar transmission antenna, a second radar transmission antenna and a first radar receiver antenna array. The second radar chip includes a second radar receiver antenna array. The controlling component can control the first radar chip and the second radar chip. The first radar transmission antenna can transmit a first radar transmission signal. The second radar transmission antenna can transmit a second radar transmission signal. The second radar chip is spaced from the first radar chip so as to create a virtual receiver antenna array between the first radar receiver antenna array and the second radar receiver antenna array.