Patents by Inventor Kasegn Tekletsadik

Kasegn Tekletsadik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8971002
    Abstract: A system and method for providing isolated power to the gate driving circuits used in solid state switching devices is disclosed. Rather than using expensive isolated AC/DC power supplies, an isolation transformer is used to provide isolated AC voltage. In one embodiment, the primary winding of the isolation transformer is disposed across an independent AC source. In another embodiment, the primary winding of the isolation transformer is disposed across two phases of the AC power line. Isolated AC voltage is then generated across the secondary winding of the isolation transformer. This isolated AC voltage is then used by a non-isolated DC power supply, which generates the power for the gate driving circuit.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: March 3, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Piotr R. Lubicki, Kasegn Tekletsadik
  • Publication number: 20150055261
    Abstract: A system and method for providing isolated power to the gate driving circuits used in solid state switching devices is disclosed. Rather than using expensive isolated AC/DC power supplies, an isolation transformer is used to provide isolated AC voltage. In one embodiment, the primary winding of the isolation transformer is disposed across an independent AC source. In another embodiment, the primary winding of the isolation transformer is disposed across two phases of the AC power line. Isolated AC voltage is then generated across the secondary winding of the isolation transformer. This isolated AC voltage is then used by a non-isolated DC power supply, which generates the power for the gate driving circuit.
    Type: Application
    Filed: August 22, 2013
    Publication date: February 26, 2015
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Piotr R. Lubicki, Kasegn Tekletsadik
  • Patent number: 8455760
    Abstract: Methods of interfacing parts in a high voltage environment and related structures are disclosed. A method comprises: providing a first part and a second part; and interfacing the first part and the second part to create a first substantially zero electrical field area at a first outer extent of an interface between the first and second parts and a reduced electrical field area in a different portion of the interface.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: June 4, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Russell J. Low, Kasegn Tekletsadik, Anthony Renau, Piotr R. Lubicki, D. Jeffrey Lischer, Steve Krause, Eric Hermanson, Doug E. May
  • Publication number: 20120264613
    Abstract: A fault current limiter system including a fault current limiter and a variable shunt current splitting device. The current splitting device includes first and second conductive windings, wherein the first conductive winding is connected in parallel with the fault current limiter and is configured to carry current in a first direction. The second conductive winding is electrically connected in series with the fault current limiter and is configured to carry current in a second direction opposite to the first direction so that the reactance of the first winding is negated by the reactance of the second winding during steady state operation of the fault current limiter system. Thus, a first portion of a steady state current is conveyed through the fault current limiter and a second portion of the current is conveyed through the current splitting device. The steady state current load, on the fault current limiter is thereby reduced.
    Type: Application
    Filed: April 11, 2012
    Publication date: October 18, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventor: Kasegn Tekletsadik
  • Publication number: 20090156409
    Abstract: A fault current limiter (FCL) article is disclosed including a superconducting tape segment that includes a substrate, a buffer layer overlying the substrate, and a high temperature superconducting (HTS) layer overlying the buffer layer, wherein the superconducting tape segment forms a meandering path that is continuous having a plurality of windings. The article also includes a shunting circuit electrically connected to the superconducting tape segment.
    Type: Application
    Filed: December 17, 2007
    Publication date: June 18, 2009
    Applicant: SUPERPOWER, INC.
    Inventors: Drew W. Hazelton, Kasegn Tekletsadik, Wayne A. Ordon
  • Patent number: 7440244
    Abstract: A modular and scaleable Matrix Fault Current Limiter (MFCL) that functions as a “variable impedance” device in an electric power network, using components made of superconducting and non-superconducting electrically conductive materials. The matrix fault current limiter comprises a fault current limiter module that includes a superconductor which is electrically coupled in parallel with a trigger coil, wherein the trigger coil is magnetically coupled to the superconductor. The current surge doing a fault within the electrical power network will cause the superconductor to transition to its resistive state and also generate a uniform magnetic field in the trigger coil and simultaneously limit the voltage developed across the superconductor. This results in fast and uniform quenching of the superconductors, significantly reduces the burnout risk associated with non-uniformity often existing within the volume of superconductor materials.
    Type: Grant
    Filed: April 2, 2005
    Date of Patent: October 21, 2008
    Inventors: Xing Yuan, Kasegn Tekletsadik
  • Publication number: 20070023680
    Abstract: In accordance with the present invention, modular corona shields are employed in a HTS device to reduce the electric field surrounding the HTS device. In a exemplary embodiment a fault current limiter module in the insulation region of a cryogenic cooling system has at least one fault current limiter set which employs a first corona shield disposed along the top portion of the fault current limiter set and is electrically coupled to the fault current limiter set. A second corona shield is disposed along the bottom portion of the fault current limiter set and is electrically coupled to the fault current limiter set. An insulation barrier is disposed within the insulation region along at least one side of the fault current limiter set. The first corona shield and the second corona shield act together to reduce the electric field surrounding the fault limiter set when voltage is applied to the fault limiter set.
    Type: Application
    Filed: May 31, 2006
    Publication date: February 1, 2007
    Inventor: Kasegn Tekletsadik
  • Publication number: 20060279388
    Abstract: A superconducting fault current limiter array with a plurality of superconductor elements arranged in a meanding array having an even number of supconductors parallel to each other and arranged in a plane that is parallel to an odd number of the plurality of superconductors, where the odd number of supconductors are parallel to each other and arranged in a plane that is parallel to the even number of the plurality of superconductors, when viewed from a top view. The even number of superconductors are coupled at the upper end to the upper end of the odd number of superconductors. A plurality of lower shunt coils each coupled to the lower end of each of the even number of superconductors and a plurality of upper shunt coils each coupled to the upper end of each of the odd number of superconductors so as to generate a generally orthoganal uniform magnetic field during quenching using only the magenetic field generated by the superconductors.
    Type: Application
    Filed: May 18, 2006
    Publication date: December 14, 2006
    Inventor: Kasegn Tekletsadik
  • Publication number: 20060274458
    Abstract: A single trigger/shunt coil is utilized for combined induced magnetic field triggering and shunt impedance. The single coil connected in parallel with the high temperature superconducting element, is designed to generate a circulating current in the parallel circuit during normal operation to aid triggering the high temperature superconducting element to quench in the event of a fault. The circulating current is generated by an induced voltage in the coil, when the system current flows through the high temperature superconducting element.
    Type: Application
    Filed: May 18, 2006
    Publication date: December 7, 2006
    Inventor: Kasegn Tekletsadik
  • Publication number: 20060221517
    Abstract: A modular and scaleable Matrix Fault Current Limiter (MFCL) that functions as a “variable impedance” device in an electric power network, using components made of superconducting and non-superconducting electrically conductive materials. The matrix fault current limiter comprises a fault current limiter module that includes a superconductor which is electrically coupled in parallel with a trigger coil, wherein the trigger coil is magnetically coupled to the superconductor. The current surge doing a fault within the electrical power network will cause the superconductor to transition to its resistive state and also generate a uniform magnetic field in the trigger coil and simultaneously limit the voltage developed across the superconductor. This results in fast and uniform quenching of the superconductors, significantly reduces the burnout risk associated with non-uniformity often exitsting within the volume of superconductor materials.
    Type: Application
    Filed: April 2, 2005
    Publication date: October 5, 2006
    Inventors: Xing Yuan, Kasegn Tekletsadik
  • Publication number: 20050117704
    Abstract: An imaging tube (52, 52?) includes a vacuum vessel (96) and an atmospheric-side supply line assembly (104, 104?). The vacuum vessel (96) has an internal vacuum (98). The supply line assembly (104, 104?) has an electromagnetic shield (94, 94?). An insulator (106, 106?) separates the internal vacuum (98) from an external atmosphere (126). A cathode post (92, 92?) resides within the vacuum vessel (96). The cathode post (92, 92?) is in conductive proximity with the electromagnetic shield (94, 94?) and prevents the bending of electrostatic field lines within the imaging tube (52, 52?).
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Applicant: GE MEDICAL SYSTEMS GLOBAL TECHNOLOGY COMPANY, LLC
    Inventors: Kasegn Tekletsadik, John Price
  • Patent number: 6901136
    Abstract: An imaging tube (52, 52?) includes a vacuum vessel (96) and an atmospheric-side supply line assembly (104, 104?). The vacuum vessel (96) has an internal vacuum (98). The supply line assembly (104, 104?) has an electromagnetic shield (94, 94?). An insulator (106, 106?) separates the internal vacuum (98) from an external atmosphere (126). A cathode post (92, 92?) resides within the vacuum vessel (96). The cathode post (92, 92?) is in conductive proximity with the electromagnetic shield (94, 94?) and prevents the bending of electrostatic field lines within the imaging tube (52, 52?).
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: May 31, 2005
    Assignee: GE Medical Systems Global Technology Co., LLC
    Inventors: Kasegn Tekletsadik, John Price