Patents by Inventor Katherina Babich
Katherina Babich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20070196748Abstract: A lithographic structure consisting essentially of: an organic antireflective material disposed on a substrate; a vapor-deposited RCHX material, wherein R is one or more elements selected from the group consisting of Si, Ge, B, Sn, Fe and Ti, and wherein X is not present or is one or more elements selected from the group consisting of O, N, S and F; and a photoresist material disposed on the RCHX material. The invention is also directed to methods of making the lithographic structure, and using the structure to pattern a substrate.Type: ApplicationFiled: February 17, 2006Publication date: August 23, 2007Applicant: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina Babich, Sean Burns, Richard Conti, Allen Gabor, Scott Halle, Arpan Mahorowala, Dirk Pfeiffer
-
Patent number: 7223517Abstract: Compositions and techniques for the processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask composition is provided. The composition comprises a fully condensed polyhedral oligosilsesquioxane, {RSiO1.5}n, wherein n equals 8; and at least one chromophore moiety and transparent moiety. In another aspect of the invention, a method for processing a semiconductor device is provided. The method comprises the steps of: providing a material layer on a substrate; forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer comprises a fully condensed polyhedral oligosilsesquioxane, {RSiO1.5}n, wherein n equals 8; and at least one chromophore moiety and transparent moiety.Type: GrantFiled: August 5, 2003Date of Patent: May 29, 2007Assignee: International Business Machines CorporationInventors: Katherina Babich, Arpan P. Mahorowala, David R. Medeiros, Dirk Pfeiffer
-
Publication number: 20070105363Abstract: Antireflective hardmask compositions and techniques for the use of antireflective hardmask compositions for processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask layer for lithography is provided. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component. In another aspect of the invention, a method for processing a semiconductor device is provided. The method comprises the steps of: providing a material layer on a substrate; forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component.Type: ApplicationFiled: December 21, 2006Publication date: May 10, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Katherina Babich, Elbert Huang, Arpan Mahorowala, David Medeiros, Dirk Pfeiffer, Karen Temple
-
Publication number: 20070090487Abstract: A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning via a novel surface preparation scheme, as well as a structure that results from the implementation of this scheme into the process integration flow for integrated circuitry are provided. The method of the present invention can by used for the selective or nonselective epitaxial growth of semiconductor material from the dissimilar surfaces.Type: ApplicationFiled: October 26, 2005Publication date: April 26, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Katherina Babich, Bruce Doris, David Medeiros, Devendra Sadana
-
Patent number: 7172849Abstract: Antireflective hardmask compositions and techniques for the use of antireflective hardmask compositions for processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask layer for lithography is provided. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component. In another aspect of the invention, a method for processing a semiconductor device is provided. The method comprises the steps of: providing a material layer on a substrate; forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component.Type: GrantFiled: August 22, 2003Date of Patent: February 6, 2007Assignee: International Business Machines CorporationInventors: Katherina Babich, Elbert Huang, Arpan P. Mahorowala, David R. Medeiros, Dirk Pfeiffer, Karen Temple
-
Publication number: 20070015082Abstract: A lithographic structure comprising: an organic antireflective material disposed on a substrate; and a silicon antireflective material disposed on the organic antireflective material. The silicon antireflective material comprises a crosslinked polymer with a SiOx backbone, a chromophore, and a transparent organic group that is substantially transparent to 193 nm or 157 nm radiation. In combination, the organic antireflective material and the silicon antireflective material provide an antireflective material suitable for deep ultraviolet lithography. The invention is also directed to a process of making the lithographic structure.Type: ApplicationFiled: July 14, 2005Publication date: January 18, 2007Applicant: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina Babich, Sean Burns, Allen Gabor, Scott Halle, Arpan Mahorowala, Dirk Pfeiffer
-
Publication number: 20070015083Abstract: An antireflective composition and a lithographic structure comprising a silicon-metal oxide, antireflective material derived from the composition. The antireflective composition comprises a polymer of formula I, wherein 1?x?2; 1?y?5; 1?0; m>0; n>0; R is a chromophore, M is a metal selected from Group IIIB to Group VIB, lanthanides, Group IIIA, Group IVA except silicon; and L is an optional ligand. The invention is also directed to a process of making a lithographic structure including a silicon-metal oxide, antireflective material.Type: ApplicationFiled: July 14, 2005Publication date: January 18, 2007Applicant: International Business Machines CorporationInventors: Katherina Babich, Sean Burns, Elbert Huang, Arpan Mahorowala, Dirk Pfeiffer, Karen Temple
-
Publication number: 20060118785Abstract: Techniques for semiconductor processing are provided. In one aspect, a method for patterning one or more features in a semiconductor device comprises the following step. At least one critical dimension of the one or more features is reduced during etching of the antireflective material. A lithographic structure is also provided.Type: ApplicationFiled: January 23, 2006Publication date: June 8, 2006Applicant: International Business Machines CorporationInventors: Scott Allen, Katherina Babich, Steven Holmes, Arpan Mahorowala, Dirk Pfeiffer, Richard Wise
-
Patent number: 6979518Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.Type: GrantFiled: December 4, 2003Date of Patent: December 27, 2005Assignee: International Business Machines CorporationInventors: Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
-
Publication number: 20050255386Abstract: Increased protection of areas of a chip are provided by both a mask structure of increased robustness in regard to semiconductor manufacturing processes or which can be removed with increased selectivity and controllability in regard to underlying materials, or both. Mask structures are provided which exhibit an interface of a chemical reaction, grain or material type which can be exploited to enhance either or both types of protection. Structures of such masks include TERA material which can be converted or hydrated and selectively etched using a mixture of hydrogen fluoride and a hygroscopic acid or organic solvent, and two layer structures of similar or dissimilar materials.Type: ApplicationFiled: May 11, 2004Publication date: November 17, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Deok-kee Kim, Kenneth Settlemyer, Kangguo Cheng, Ramachandra Divakaruni, Carl Radens, Dirk Pfeiffer, Timothy Dalton, Katherina Babich, Arpan Mahorowala, Harald Okorn-Schmidt
-
Publication number: 20050098091Abstract: Methods for generating a nanostructure and for enhancing etch selectivity, and a nanostructure are disclosed. The invention implements a tunable etch-resistant anti-reflective (TERA) material integration scheme which gives high etch selectivity for both etching pattern transfer through the TERA layer (used as an ARC and/or hardmask) with etch selectivity to the patterned photoresist, and etching to pattern transfer through a dielectric layer of nitride. This is accomplished by oxidizing a TERA layer after etching pattern transfer through the TERA layer to form an oxidized TERA layer having chemical properties similar to oxide. The methods provide all of the advantages of the TERA material and allows for high etch selectivity (approximately 5-10:1) for etching to pattern transfer through nitride. In addition, the methodology reduces LER and allows for trimming despite reduced photoresist thickness.Type: ApplicationFiled: November 10, 2003Publication date: May 12, 2005Applicant: International Business Machines CorporationInventors: Katherina Babich, Scott Halle, David Horak, Arpan Mahorowala, Wesley Natzle, Dirk Pfeiffer, Hongwen Yan
-
Publication number: 20050100683Abstract: A method and apparatus for improving the post-development photoresist profile on a deposited dielectric film. The method includes depositing a TERA film having tunable optical and etch resistant properties on a substrate using a plasma-enhanced chemical vapor deposition process and post processing the TERA film using a plasma process. The apparatus includes a chamber having an upper electrode coupled to a first RF source and a substrate holder coupled to a second RF source; and a showerhead for providing multiple precursors and process gasses.Type: ApplicationFiled: November 6, 2003Publication date: May 12, 2005Applicants: Tokyo Electron Limited, International Business Machines CorporationInventors: Noriaki Fukiage, Katherina Babich
-
Publication number: 20050100682Abstract: A method and apparatus for depositing a TERA film having tunable optical and etch resistant properties on a substrate using a plasma-enhanced chemical vapor deposition process, wherein for at least a part of the deposition of the TERA film, the plasma-enhanced chemical vapor deposition process employs a precursor that reduces reaction with a photoresist. The apparatus includes a chamber having an upper electrode coupled to a first RF source and a substrate holder coupled to a second RF source; and a showerhead for providing multiple process and precursor gasses.Type: ApplicationFiled: November 6, 2003Publication date: May 12, 2005Applicants: Tokyo Electron Limited, International Business Machines CorporationInventors: Noriaki Fukiage, Katherina Babich
-
Publication number: 20050064322Abstract: A multilayer lithographic structure which includes a substrate, having on a major surface thereof a first layer including a water and/or aqueous base soluble material which includes Ge, O, and H, and optionally X, wherein X is at least one of Si, N, and F; and disposed on the first layer a second layer which includes an energy photoactive material.Type: ApplicationFiled: September 19, 2003Publication date: March 24, 2005Inventors: Katherina Babich, Alfred Grill, Arpan Mahorowala, Dirk Pfeiffer
-
Publication number: 20050056823Abstract: Techniques for semiconductor processing are provided. In one aspect, a method for patterning one or more features in a semiconductor device comprises the following step. At least one critical dimension of the one or more features is reduced during etching of the antireflective material. A lithographic structure is also provided.Type: ApplicationFiled: September 12, 2003Publication date: March 17, 2005Applicant: International Business Machines CorporationInventors: Scott Allen, Katherina Babich, Steven Holmes, Arpan Mahorowala, Dirk Pfeiffer, Richard Wise
-
Publication number: 20050042538Abstract: Antireflective hardmask compositions and techniques for the use of antireflective hardmask compositions for processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask layer for lithography is provided. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component. In another aspect of the invention, a method for processing a semiconductor device is provided. The method comprises the steps of: providing a material layer on a substrate; forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer comprises a carbosilane polymer backbone comprising at least one chromophore moiety and at least one transparent moiety; and a crosslinking component.Type: ApplicationFiled: August 22, 2003Publication date: February 24, 2005Applicant: International Business Machines CorporationInventors: Katherina Babich, Elbert Huang, Arpan Mahorowala, David Medeiros, Dirk Pfeiffer, Karen Temple
-
Publication number: 20050037604Abstract: A novel air-gap-containing interconnect wiring structure is described incorporating a solid low-k dielectric in the via levels, and a composite solid plus air-gap dielectric in the wiring levels. Also provided is a method for forming such an interconnect structure. The method is readily scalable to interconnect structures containing multiple wiring levels, and is compatible with Dual Damascene Back End of the Line (BEOL) processing.Type: ApplicationFiled: September 24, 2004Publication date: February 17, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Katherina Babich, Roy Carruthers, Timothy Dalton, Alfred Grill, Jeffrey Hedrick, Christopher Jahnes, Ebony Mays, Laurent Perraud, Sampath Purushothaman, Katherine Saenger
-
Publication number: 20050031964Abstract: Compositions and techniques for the processing of semiconductor devices are provided. In one aspect of the invention, an antireflective hardmask composition is provided. The composition comprises a fully condensed polyhedral oligosilsesquioxane, {RSiO1.5}n, wherein n equals 8; and at least one chromophore moiety and transparent moiety. In another aspect of the invention, a method for processing a semiconductor device is provided. The method comprises the steps of: providing a material layer on a substrate; forming an antireflective hardmask layer over the material layer. The antireflective hardmask layer comprises a fully condensed polyhedral oligosilsesquioxane, {RSiO1.5}n, wherein n equals 8; and at least one chromophore moiety and transparent moiety.Type: ApplicationFiled: August 5, 2003Publication date: February 10, 2005Applicant: International Business Machines CorporationInventors: Katherina Babich, Arpan Mahorowala, David Medeiros, Dirk Pfeiffer
-
Publication number: 20040170907Abstract: An attenuating embedded phase shift photomask blank that produces a phase shift of the transmitted light is formed with an optically translucent film made of metal, silicon, nitrogen and oxygen. An etch stop layer is added to improve the etch selectivity of the phase shifting layer. A wide range of optical transmission (0.001% up to 15% at 157 nm) is obtained by this process.Type: ApplicationFiled: December 4, 2003Publication date: September 2, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Marie Angelopoulos, Katherina Babich, S. Jay Chey, Michael Straight Hibbs, Robert N. Lang, Arpan Pravin Mahorowala, Kenneth Christopher Racette
-
Patent number: 6759321Abstract: A method for providing regions of substantially lower fluorine content in a fluorine containing dielectric is described incorporating exposing a region to ultraviolet radiation and annealing at an elevated temperature to remove partially disrupted fluorine from the region. The invention overcomes the problem of fluorine from a fluorine containing dielectric reacting with other materials while maintaining a bulk dielectric material of sufficiently high or original fluorine content to maintain an effective low dielectric constant in semiconductor chip wiring interconnect structures.Type: GrantFiled: July 25, 2002Date of Patent: July 6, 2004Assignee: International Business Machines CorporationInventors: Katherina Babich, Alessandro Callegari, Stephen Alan Cohen, Alfred Grill, Christopher Vincent Jahnes, Vishnubhai Vitthalbhai Patel, Sampath Purushothaman, Katherine Lynn Saenger