Patents by Inventor Kathleen B. Reuter
Kathleen B. Reuter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9401443Abstract: Photovoltaic devices and methods for preparing a p-type semiconductor generally include electroplating a layer of gallium or a gallium alloy onto a conductive layer by contacting the conductive layer with a plating bath free of complexing agents including a gallium salt, methane sulfonic acid or sodium sulfate and an organic additive comprising at least one nitrogen atom and/or at least one sulfur atom, and a solvent; adjusting a pH of the solution to be less than 2.6 or greater than 12.6. The photovoltaic device includes an impurity in the p-type semiconductor layer selected from the group consisting of arsenic, antimony, bismuth, and mixtures thereof. Various photovoltaic precursor layers for forming CIS, CGS and CIGS p-type semiconductor structures can be formed by electroplating the gallium or gallium alloys in this manner. Also disclosed are processes for forming a thermal interface of gallium or a gallium alloy.Type: GrantFiled: September 5, 2012Date of Patent: July 26, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Shafaat Ahmed, Hariklia Deligianni, Qiang Huang, Kathleen B. Reuter, Lubomyr T. Romankiw, Raman Vaidyanathan
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Patent number: 9188578Abstract: An anti-retraction capping material is formed on a surface of a nanowire that is located upon a dielectric membrane. A gap is then formed into the anti-retraction capping material and nanowire forming first and second capped nanowire structures of a nanodevice. The nanodevice can be used for recognition tunneling measurements including, for example DNA sequencing. The anti-retraction capping material serves as a mobility barrier to pin, i.e., confine, a nanowire portion of each of the first and second capped nanowire structures in place, allowing long-term structural stability. In some embodiments, interelectrode leakage through solution during recognition tunneling measurements can be minimized.Type: GrantFiled: September 30, 2013Date of Patent: November 17, 2015Assignee: GLOBALFOUNDRIES INC.Inventors: Yann A. N. Astier, Jingwei Bai, Satyavolu S. Papa Rao, Kathleen B. Reuter, Joshua T. Smith
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Patent number: 9097698Abstract: An anti-retraction capping material is formed on a surface of a nanowire that is located upon a dielectric membrane. A gap is then formed into the anti-retraction capping material and nanowire forming first and second capped nanowire structures of a nanodevice. The nanodevice can be used for recognition tunneling measurements including, for example DNA sequencing. The anti-retraction capping material serves as a mobility barrier to pin, i.e., confine, a nanowire portion of each of the first and second capped nanowire structures in place, allowing long-term structural stability. In some embodiments, interelectrode leakage through solution during recognition tunneling measurements can be minimized.Type: GrantFiled: January 29, 2015Date of Patent: August 4, 2015Assignee: International Business Machines CorporationInventors: Yann A. N. Astier, Jingwei Bai, Satyavolu S. Papa Rao, Kathleen B. Reuter, Joshua T. Smith
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Publication number: 20150137069Abstract: An anti-retraction capping material is formed on a surface of a nanowire that is located upon a dielectric membrane. A gap is then formed into the anti-retraction capping material and nanowire forming first and second capped nanowire structures of a nanodevice. The nanodevice can be used for recognition tunneling measurements including, for example DNA sequencing. The anti-retraction capping material serves as a mobility barrier to pin, i.e., confine, a nanowire portion of each of the first and second capped nanowire structures in place, allowing long-term structural stability. In some embodiments, interelectrode leakage through solution during recognition tunneling measurements can be minimized.Type: ApplicationFiled: January 29, 2015Publication date: May 21, 2015Inventors: Yann A.N. Astier, Jingwei Bai, Satyavolu S. Papa Rao, Kathleen B. Reuter, Joshua T. Smith
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Publication number: 20140374695Abstract: An anti-retraction capping material is formed on a surface of a nanowire that is located upon a dielectric membrane. A gap is then formed into the anti-retraction capping material and nanowire forming first and second capped nanowire structures of a nanodevice. The nanodevice can be used for recognition tunneling measurements including, for example DNA sequencing. The anti-retraction capping material serves as a mobility barrier to pin, i.e., confine, a nanowire portion of each of the first and second capped nanowire structures in place, allowing long-term structural stability. In some embodiments, interelectrode leakage through solution during recognition tunneling measurements can be minimized.Type: ApplicationFiled: September 30, 2013Publication date: December 25, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Yann A. N. Astier, Jingwei Bai, Satyavolu S. Papa Rao, Kathleen B. Reuter, Joshua T. Smith
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Publication number: 20130269780Abstract: The present invention relates to a method for fabricating a thin layer made of a alloy and having photovoltaic properties. The method according to the invention comprises first steps of: a) depositing an adaptation layer (MO) on a substrate (SUB), b) depositing at least one layer (SEED) comprising at least elements I and/or III, on said adaptation layer. The adaptation layer is deposited under near vacuum conditions and step b) comprises a first operation of depositing a first layer of I and/or III elements, under same conditions as the deposition of the adaptation layer, without exposing to air the adaptation layer.Type: ApplicationFiled: December 20, 2011Publication date: October 17, 2013Applicant: NEXCISInventors: Pierre-Philippe Grand, Jesus Salvadoe Jaime Ferrer, Emmanuel Roche, Hariklia Deligianni, Raman Vaidyanathan, Kathleen B. Reuter, Qiang Huang, Lubomyr Romankiw, Maurice Mason, Donna S. Zupanski-Nielsen
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Publication number: 20130008798Abstract: Photovoltaic devices and methods for preparing a p-type semiconductor generally include electroplating a layer of gallium or a gallium alloy onto a conductive layer by contacting the conductive layer with a plating bath free of complexing agents including a gallium salt, methane sulfonic acid or sodium sulfate and an organic additive comprising at least one nitrogen atom and/or at least one sulfur atom, and a solvent; adjusting a pH of the solution to be less than 2.6 or greater than 12.6. The photovoltaic device includes an impurity in the p-type semiconductor layer selected from the group consisting of arsenic, antimony, bismuth, and mixtures thereof. Various photovoltaic precursor layers for forming CIS, CGS and CIGS p-type semiconductor structures can be formed by electroplating the gallium or gallium alloys in this manner. Also disclosed are processes for forming a thermal interface of gallium or a gallium alloy.Type: ApplicationFiled: September 5, 2012Publication date: January 10, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Shafaat Ahmed, Hariklia Deligianni, Qiang Huang, Kathleen B. Reuter, Lubomyr T. Romankiw, Raman Vaidyanathan
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Publication number: 20120055612Abstract: Photovoltaic devices and methods for preparing a p-type semiconductor layer for the photovoltaic devices generally include electroplating a layer of gallium or a gallium alloy onto a conductive layer by contacting the conductive layer with a plating bath free of complexing agents including a gallium salt, methane sulfonic acid or sodium sulfate and an organic additive comprising at least one nitrogen atom and/or at least one sulfur atom, and a solvent; adjusting a pH of the solution to be less than 2.6 or greater than 12.6. The photovoltaic device includes an impurity in the p-type semiconductor layer selected from the group consisting of arsenic, antimony, bismuth, and mixtures thereof. Various photovoltaic precursor layers for forming CIS, CGS and CIGS p-type semiconductor structures can be formed by electroplating the gallium or gallium alloys in this manner. Also disclosed are processes for forming a thermal interface of gallium or a gallium alloy with the electroplating process.Type: ApplicationFiled: September 2, 2010Publication date: March 8, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Shafaat Ahmed, Hariklia Deligianni, Qiang Huang, Kathleen B. Reuter, Lubomyr T. Romankiw, Raman Vaidyanathan