Abstract: A processing system is described which assigns jobs to heterogeneous processing modules. The processing system assigns jobs to the processing modules in a manner that attempts to accommodate the service demands of the jobs, but without advance knowledge of the service demands. In one case, the processing system implements the processing modules as computing units that have different physical characteristics. Alternatively, or in addition, the processing system may implement the processing modules as threads that are executed by computing units. Each thread which runs on a computing unit offers a level of performance that depends on a number of other threads that are simultaneously being executed by the same computing unit.

Abstract: A processing system is described which assigns jobs to heterogeneous processing modules. The processing system assigns jobs to the processing modules in a manner that attempts to accommodate the service demands of the jobs, but without advance knowledge of the service demands. In one case, the processing system implements the processing modules as computing units that have different physical characteristics. Alternatively, or in addition, the processing system may implement the processing modules as threads that are executed by computing units. Each thread which runs on a computing unit offers a level of performance that depends on a number of other threads that are simultaneously being executed by the same computing unit.

Abstract: A processing system is described which assigns jobs to heterogeneous processing modules. The processing system assigns jobs to the processing modules in a manner that attempts to accommodate the service demands of the jobs, but without advance knowledge of the service demands. In one case, the processing system implements the processing modules as computing units that have different physical characteristics. Alternatively, or in addition, the processing system may implement the processing modules as threads that are executed by computing units. Each thread which runs on a computing unit offers a level of performance that depends on a number of other threads that are simultaneously being executed by the same computing unit.

Abstract: A processing system is described which assigns jobs to heterogeneous processing modules. The processing system assigns jobs to the processing modules in a manner that attempts to accommodate the service demands of the jobs, but without advance knowledge of the service demands. In one case, the processing system implements the processing modules as computing units that have different physical characteristics. Alternatively, or in addition, the processing system may implement the processing modules as threads that are executed by computing units. Each thread which runs on a computing unit offers a level of performance that depends on a number of other threads that are simultaneously being executed by the same computing unit.

Abstract: Various techniques for evaluating probabilistic assertions are described herein. In one example, a method includes transforming a program, a probabilistic assertion, and an input into an intermediate representation, the intermediate representation including a Bayesian network of nodes representing distributions. The method further includes verifying a probabilistic assertion in the program using the intermediate representation.

Abstract: Disclosed herein are systems and methods for paging to a direct segment maintained by a multiplexed TLB. The multiplexed TLB defines a direct segment to directly map a virtual address range to a physical address range, which increases the reach of the multiplexed TLB. A partition code is maintained in the multiplexed TLB to indicate usage of the direct segment by an associated process. A management process, such as a system pager, uses the unused part of the direct segment for storing paged data. As the process continues to use more of the direct segment, paged data stored in the previously unused part of the direct segment can be evicted from memory or moved elsewhere in memory so that the process can continue to use the direct segment.

Abstract: A processing system is described which assigns jobs to heterogeneous processing modules. The processing system assigns jobs to the processing modules in a manner that attempts to accommodate the service demands of the jobs, but without advance knowledge of the service demands. In one case, the processing system implements the processing modules as computing units that have different physical characteristics. Alternatively, or in addition, the processing system may implement the processing modules as threads that are executed by computing units. Each thread which runs on a computing unit offers a level of performance that depends on a number of other threads that are simultaneously being executed by the same computing unit.

Abstract: A processing system is described which assigns jobs to heterogeneous processing modules. The processing system assigns jobs to the processing modules in a manner that attempts to accommodate the service demands of the jobs, but without advance knowledge of the service demands. In one case, the processing system implements the processing modules as computing units that have different physical characteristics. Alternatively, or in addition, the processing system may implement the processing modules as threads that are executed by computing units. Each thread which runs on a computing unit offers a level of performance that depends on a number of other threads that are simultaneously being executed by the same computing unit.

Abstract: Various techniques for evaluating probabilistic assertions are described herein. In one example, a method includes transforming a program, a probabilistic assertion, and an input into an intermediate representation, the intermediate representation including a Bayesian network of nodes representing distributions. The method further includes verifying a probabilistic assertion in the program using the intermediate representation.

Abstract: Disclosed herein are systems and methods for paging to a direct segment maintained by a multiplexed TLB. The multiplexed TLB defines a direct segment to directly map a virtual address range to a physical address range, which increases the reach of the multiplexed TLB. A partition code is maintained in the multiplexed TLB to indicate usage of the direct segment by an associated process. A management process, such as a system pager, uses the unused part of the direct segment for storing paged data. As the process continues to use more of the direct segment, paged data stored in the previously unused part of the direct segment can be evicted from memory or moved elsewhere in memory so that the process can continue to use the direct segment.

Abstract: The techniques discussed herein identify failed segments of memory in a memory region. The techniques may then manage the failed segments of memory by logically clustering the failed segments of memory at an outlying portion of the memory region using a remapping process. The remapping process may include creating and storing remapping metadata defining segment remapping entries for the memory region. Accordingly, the failure clustering logically eliminates or reduces the memory fragmentation so that a system can allocate larger portions of contiguous memory for object storage.

Abstract: A processing system is described which assigns jobs to heterogeneous processing modules. The processing system assigns jobs to the processing modules in a manner that attempts to accommodate the service demands of the jobs, but without advance knowledge of the service demands. In one case, the processing system implements the processing modules as computing units that have different physical characteristics. Alternatively, or in addition, the processing system may implement the processing modules as threads that are executed by computing units. Each thread which runs on a computing unit offers a level of performance that depends on a number of other threads that are simultaneously being executed by the same computing unit.

Abstract: The techniques discussed herein identify failed segments of memory in a memory region. The techniques may then manage the failed segments of memory by logically clustering the failed segments of memory at an outlying portion of the memory region using a remapping process. The remapping process may include creating and storing remapping metadata defining segment remapping entries for the memory region. Accordingly, the failure clustering logically eliminates or reduces the memory fragmentation so that a system can allocate larger portions of contiguous memory for object storage.