Abstract: A semiconductor device for power amplification includes: a source electrode, a drain electrode, and a gate electrode disposed above a semiconductor stack structure including a first nitride semiconductor layer and a second nitride semiconductor layer; and a source field plate that is disposed above the semiconductor stack structure between the gate electrode and the drain electrode, and has a same potential as a potential of the source electrode. The source field plate has a staircase shape, and even when length LF2 of an upper section is increased for electric field relaxation, an increase in parasitic capacitance Cds generated between the source field plate and a 2DEG surface is inhibited.

Abstract: A semiconductor device includes a source electrode portion and a drain electrode formed on a semiconductor stacked body so as to be at an interval from each other, and a gate electrode formed between the source electrode portion and the drain electrode at an interval from the source electrode portion and the drain electrode. The source electrode portion includes a first recess electrode being directly in contact with a two-dimensional electron gas layer formed in the first nitride semiconductor layer, and a surface electrode formed between the gate electrode and the first recess electrode and connected conductively to the two-dimensional electron gas layer. A source potential is applied to the surface electrode and the recess electrode, and a width of the surface electrode in a gate-source direction is 0.4 times or more a distance between a gate-side end of the surface electrode and a source-side end of the gate electrode.

Abstract: A semiconductor device includes a source electrode portion and a drain electrode formed on a semiconductor stacked body so as to be at an interval from each other, and a gate electrode formed between the source electrode portion and the drain electrode at an interval from the source electrode portion and the drain electrode. The source electrode portion includes a first recess electrode being directly in contact with a two-dimensional electron gas layer formed in the first nitride semiconductor layer, and a surface electrode formed between the gate electrode and the first recess electrode and connected conductively to the two-dimensional electron gas layer. A source potential is applied to the surface electrode and the recess electrode, and a width of the surface electrode in a gate-source direction is 0.4 times or more a distance between a gate-side end of the surface electrode and a source-side end of the gate electrode.

Abstract: An electronic device includes a heat sink, a substrate mounted on the heat sink, a coating layer formed on the substrate, a lead frame fixed to the heat sink, and a mold resin sealing the substrate and the lead frame. The coating layer is made of one of a polyimide-based resin and a polyamideimide-based resin. The lead frame has a fixing terminal fixed to the heat sink through an adhesive layer. The adhesive layer is made of the same material as the coating layer.

Abstract: A high-frequency power amplifier that amplifies a high-frequency input signal and outputs a signal having one power selected from a plurality of powers includes a high output route that is a circuit, which amplifies the input signal and outputs a signal of a high power, and a medium output route that is a circuit, which amplifies the input signal and outputs a signal of a medium power. The high output route includes a high-output amplifier that amplifies the input signal, an output matching circuit that is connected to an output node of the high-output amplifier, and a switch element that is connected to an output node of the output matching circuit. The medium output route includes a medium-output amplifier that amplifies the input signal and a switch element that is connected between an output node of the medium-output amplifier and an output node of the output matching circuit.

Abstract: A high-frequency power amplifier that amplifies a high-frequency input signal and outputs a signal having one power selected from a plurality of powers includes a high output route that is a circuit, which amplifies the input signal and outputs a signal of a high power, and a medium output route that is a circuit, which amplifies the input signal and outputs a signal of a medium power. The high output route includes a high-output amplifier that amplifies the input signal, an output matching circuit that is connected to an output node of the high-output amplifier, and a switch element that is connected to an output node of the output matching circuit. The medium output route includes a medium-output amplifier that amplifies the input signal and a switch element that is connected between an output node of the medium-output amplifier and an output node of the output matching circuit.

Abstract: The radio frequency power amplifier is connected between an other end of the first switching element and an other end of the second switching element, supplies power to a second amplifier via the first switching element and a second matching circuit, and includes a first power supply line for supplying power to the third amplifier via a second switching element and a third matching circuit, and the other end of the first switching element is connected to an input node of the first matching circuit, the other end of the second switching element is connected to the input node of the first matching circuit via the first power supply line, and an impedance of an output side of the RF power amplifier as viewed from an output node of the third amplifier is higher than an impedance of the RF power amplifier as viewed from an output node of the second amplifier.

Abstract: The radio frequency power amplifier is connected between an other end of the first switching element and an other end of the second switching element, supplies power to a second amplifier via the first switching element and a second matching circuit, and includes a first power supply line for supplying power to the third amplifier via a second switching element and a third matching circuit, and the other end of the first switching element is connected to an input node of the first matching circuit, the other end of the second switching element is connected to the input node of the first matching circuit via the first power supply line, and an impedance of an output side of the RF power amplifier as viewed from an output node of the third amplifier is higher than an impedance of the RF power amplifier as viewed from an output node of the second amplifier.

Abstract: An electronic device includes a heat sink, a substrate mounted on the heat sink, a coating layer formed on the substrate, a lead frame fixed to the heat sink, and a mold resin sealing the substrate and the lead frame. The coating layer is made of one of a polyimide-based resin and a polyamideimide-based resin. The lead frame has a fixing terminal fixed to the heat sink through an adhesive layer. The adhesive layer is made of the same material as the coating layer.

Abstract: A wired circuit board includes an insulating base layer, a conductive pattern formed on the insulating base layer, a tin-based thin layer formed on a surface of the conductive pattern, and containing at least tin oxide, and an insulating cover layer formed on the insulating base layer so as to cover the tin-based thin layer.

Abstract: A base mesa finger (an emitter ledge layer 15, a base layer 16, and a collector layer 17) is interposed between two collector fingers (collector electrodes 13), and on the base mesa finger, a base finger (a base electrode 12) and two emitter fingers (an emitter layer 14 and an emitter electrode 11) on both sides of the base finger, are formed. The two emitter fingers are formed symmetric with respect to the base finger as a reference.

Abstract: A power amplifier amplifies an input signal having a fundamental frequency of which band width ranges between a first fundamental frequency F1 and a second fundamental frequency F2. The power amplifier includes a power amplifier transistor for amplifying the input signal and an output matching circuit for suppressing a harmonic component included in an output signal from the power amplifier transistor. The output matching circuit includes: a first second-order harmonic series resonant circuit including a first inductor and a first capacitor and having a frequency twice as large as F1 as a resonance frequency; and a second second-order harmonic series resonant circuit including a second inductor and a second capacitor and having a frequency twice as large as F2 as a resonance frequency.

Abstract: A high-frequency power amplifier device including: a power amplifier circuit which amplifies a high-frequency signal; an output matching circuit connected to an output side of the power amplifier circuit; and a high-frequency circuit connected to an output side of the output matching circuit, which is designed so that X[f] satisfies the relationship expressed as X[L]<X[H], where j denotes an imaginary number, f denotes a frequency, an impedance of the high-frequency circuit viewed from the output matching circuit is defined as Z[f]=R[f]+jX[f], L denotes a lower limit of the frequency, and H denotes an upper limit of the frequency.

Abstract: A capacitor 12 is formed by laminating a lower electrode 12b, a dielectric 12e and an upper electrode 12t in this order. An inductor 14 is formed as a thin metal wiring of a spiral shape so as to have an inductor component. The inductor 14 is formed in the same wiring layer and of the same metal material as the lower electrode 12b of the capacitor 12 connected to a base electrode 11b of a transistor 11. The DC bias is inputted to the base B of the transistor 11 through the inductor 14 of a spiral shape from the DC bias supply wiring BP, and a radio frequency signal is inputted to the base B of the transistor 11 through the capacitor 12.

Abstract: A power amplifier amplifies an input signal having a fundamental frequency of which band width ranges between a first fundamental frequency F1 and a second fundamental frequency F2. The power amplifier includes a power amplifier transistor for amplifying the input signal and an output matching circuit for suppressing a harmonic component included in an output signal from the power amplifier transistor. The output matching circuit includes: a first second-order harmonic series resonant circuit including a first inductor and a first capacitor and having a frequency twice as large as F1 as a resonance frequency; and a second second-order harmonic series resonant circuit including a second inductor and a second capacitor and having a frequency twice as large as F2 as a resonance frequency.

Abstract: The transistor circuit 1 includes a plurality of transistor cells 10 each having a transistor 11, a base ballast resistor 12, a capacitor 13, and an inductor 14. The transistors 11 have the respective collectors commonly connected to a collector terminal 1c of the transistor circuit 1 and the respective emitters commonly connected to an emitter terminal 1e thereof. Each base ballast resistor 12 is connected to bases of the transistor 11 at one end and to a base terminal 1b of the transistor circuit 1 at the other end. The capacitor 13 is serially connected to the inductor 14, thus to form a serial resonant circuit 15, which is connected in parallel with the base ballast resistor 12 and provided between the bases of the transistor 11 and the base terminal 1b of the transistor circuit 1 and connected thereto.

Abstract: A high-frequency power amplifier device including: a power amplifier circuit which amplifies a high-frequency signal; an output matching circuit connected to an output side of the power amplifier circuit; and a high-frequency circuit connected to an output side of the output matching circuit, which is designed so that X[f] satisfies the relationship expressed as X[L]<X[H], where j denotes an imaginary number, f denotes a frequency, an impedance of the high-frequency circuit viewed from the output matching circuit is defined as Z[f]=R[f]+jX[f], L denotes a lower limit of the frequency, and H denotes an upper limit of the frequency.

Abstract: A base mesa finger (an emitter ledge layer 15, a base layer 16, and a collector layer 17) is interposed between two collector fingers (collector electrodes 13), and on the base mesa finger, a base finger (a base electrode 12) and two emitter fingers (an emitter layer 14 and an emitter electrode 11) on both sides of the base finger, are formed. The two emitter fingers are formed symmetric with respect to the base finger as a reference.

Abstract: A capacitor 12 is formed by laminating a lower electrode 12b, a dielectric 12e and an upper electrode 12t in this order. An inductor 14 is formed as a thin metal wiring of a spiral shape so as to have an inductor component. The inductor 14 is formed in the same wiring layer and of the same metal material as the lower electrode 12b of the capacitor 12 connected to a base electrode 11b of a transistor 11. The DC bias is inputted to the base B of the transistor 11 through the inductor 14 of a spiral shape from the DC bias supply wiring BP, and a radio frequency signal is inputted to the base B of the transistor 11 through the capacitor 12.

Abstract: There are provided a transistor integrated circuit device which reduces the integrated area of a circuit while avoiding an element destruction caused by thermal runaway, and a method of manufacturing the transistor integrated circuit device. A cut capacitor (13) is composed of an upper electrode formed from a wiring metal and in a first layer; and a lower electrode formed from a wiring metal and in a second layer. A bias resistor (12) is formed from the same wiring metal as that of the lower electrode of the cut capacitor (13). This bias resistor (12) is formed from a wiring metal which is made into a thin film to function as a sheet resistor, and the resistance value of the bias resistor (12) can be freely set according to the thickness or width of the wiring metal.