Abstract: In one embodiment, a preliminary solder layer made of a Sn alloy is formed on a connecting pad of a wiring substrate. A solder bump made of a Sn alloy is formed on an electrode pad of a semiconductor chip. After contacting the preliminary solder layer and the solder bump, the preliminary solder layer and the solder bump are melted by heating to a temperature of their melting points or higher to form a solder connecting part made of a Sn alloy containing Ag and Cu. Only the preliminary solder layer of the preliminary solder layer and the solder bump is composed of a Sn alloy containing Ag.

Abstract: The present invention is a vertical-type heat processing apparatus comprising: a heat processing furnace; a holder capable of being loaded into the heat processing furnace and unloaded therefrom, with holding therein a plurality of objects to be processed at predetermined vertical intervals in a tier-like manner; a transfer mechanism including a base table capable of vertically moving and rotating, and a substrate supporter capable of horizontally moving on the base table; and a controller for controlling the transfer mechanism; wherein the transfer mechanism is adapted to transfer an object to be processed between a container containing a plurality of objects to be processed at predetermined intervals, and the holder; the substrate supporter includes a to-and-fro driving part for driving the substrate supporter in the horizontal direction, and a pitch-change driving part for changing a pitch at which the objects to be processed are supported; the controller is adapted to monitor at least one information of p

Abstract: A processing apparatus according to the present invention comprises: a container 3 that contains a plurality of objects to be processed w, the container including an outlet port 3a formed in a front surface thereof for taking out the object to be processed w, and a lid 3b for hermetically sealing the outlet port 3a; a loading area Sa into which the container 3 is loaded; a conveying area Sb whose atmosphere differs from an atmosphere in the loading area Sa; a partition wall 6 that separates the loading area Sa and the conveying area Sb from each other, and has an opening 13; a door 14 for opening and closing the opening 13 in the partition wall 6; and a stage 10 for placing the container 3 at a position near the opening 13 in the loading area Sa. Parts to be pressed 20 are provided on opposite sides on a side of the front surface of the container 3.

Abstract: The present invention is a vertical-type heat processing apparatus comprising: a heat processing furnace; a holder capable of being loaded into the heat processing furnace and unloaded therefrom, with holding therein a plurality of objects to be processed at predetermined vertical intervals in a tier-like manner; a transfer mechanism including a base table capable of vertically moving and rotating, and a substrate supporter capable of horizontally moving on the base table; and a controller for controlling the transfer mechanism; wherein the transfer mechanism is adapted to transfer an object to be processed between a container containing a plurality of objects to be processed at predetermined intervals, and the holder; the substrate supporter includes a to-and-fro driving part for driving the substrate supporter in the horizontal direction, and a pitch-change driving part for changing a pitch at which the objects to be processed are supported; the controller is adapted to monitor at least one information of p

Abstract: The present invention is a vertical-type heat processing apparatus comprising: a heat processing furnace; a holder capable of being loaded into the heat processing furnace and unloaded therefrom, with holding therein a plurality of objects to be processed at predetermined vertical intervals in a tier-like manner; a transfer mechanism including a base table capable of vertically moving and rotating, and a substrate supporter capable of horizontally moving on the base table; and a controller for controlling the transfer mechanism; wherein the transfer mechanism is adapted to transfer an object to be processed between a container containing a plurality of objects to be processed at predetermined intervals, and the holder; the substrate supporter includes a to-and-fro driving part for driving the substrate supporter in the horizontal direction, and a pitch-change driving part for changing a pitch at which the objects to be processed are supported; the controller is adapted to monitor an encoder value outputted fr

Abstract: The present invention is a processing apparatus for an object to be processed, the processing apparatus including: a partition that defines an outside space area in which a container hermetically containing an object to be processed and having a lid is conveyed, and an inside space area in which the object to be processed taken out from the container is conveyed; an opening part provided in the partition, through which the two space areas are communicated with each other; a door mechanism that can close the opening part; a lid opening-and-closing mechanism provided at the door mechanism, and capable of opening and closing the lid of the container located at a predetermined position in the outside space area under a situation wherein the door mechanism closes the opening part; a driving unit that moves the lid opening-and-closing mechanism away from the container relatively to the door mechanism; a cover member that defines a driving-unit arrangement room, in which the driving unit is contained, in the door me

Abstract: A semiconductor device is disclosed which comprises a plurality of semiconductor chips having a plurality of terminals, two chip mounting bases on each of which at least one of the semiconductor chips is mounted and a plurality of chip interconnections electrically connected to the terminals of the mounted semiconductor chip are formed into substantially the same pattern and which are stacked in two layers, one interconnection base which is interposed between the two chip mounting bases and on which a plurality of intermediate interconnections electrically connected to the chip interconnections are formed into a pattern different from the pattern of the chip interconnections, and a plurality of interlevel interconnections which are formed in a plurality of through holes extending through the chip mounting bases and the interconnection base at once along a stacking direction and electrically connect the chip interconnections and the intermediate interconnections.

Abstract: A surface mount type semiconductor device comprises a support substrate having mutually opposed first and second surfaces, and having a slit at a central part thereof, a semiconductor element including electrode pads at least a central part thereof, the semiconductor element being mounted on the first surface such that the electrode pads are located within the slit, a width of the semiconductor element is less than a longitudinal length of the slit and both ends of the slit are located outside end portions of the semiconductor element, metal fine wires for electrically connecting the electrode pads to the connection terminals on the second surface, a first seal resin member provided to seal the semiconductor element on the first surface, and a second seal resin member provided to seal the slit on the second surface.

Abstract: The present invention includes: a box case having a size capable of containing an open type of cassette that can hold a plurality of first objects to be processed and capable of containing a plurality of second objects to be processed, the second objects to be processed being larger than the first objects to be processed; a supporting part provided at an inside wall surface of the box case, the supporting part being capable of supporting the second objects to be processed in a tier-like manner; an open-close lid provided at an opening part of the box case in a removable and attachable manner; and a positioning-engaging part provided at a bottom part of the box case in a removable and attachable manner. The open-close lid is capable of sealing the box case. The positioning-engaging part is capable of engaging with a positioning part provided at a lower surface of a bottom part of the cassette to position the cassette.

Abstract: The present invention includes: a box case having a size capable of containing an open type of cassette that can hold a plurality of first objects to be processed and capable of containing a plurality of second objects to be processed, the second objects to be processed being larger than the first objects to be processed; a supporting part provided at an inside wall surface of the box case, the supporting part being capable of supporting the second objects to be processed in a tier-like manner; an open-close lid provided at an opening part of the box case in a removable and attachable manner; and a positioning-engaging part provided at a bottom part of the box case in a removable and attachable manner. The open-close lid is capable of sealing the box case. The positioning-engaging part is capable of engaging with a positioning part provided at a lower surface of a bottom part of the cassette to position the cassette.

Abstract: There is disclosed a laminated-chip semiconductor device which comprises two chip-mounting substrates on each of which at least one semiconductor chip having a plurality of terminals for signals is mounted, and a plurality of chip connecting wirings electrically connected to the terminals for signals of the each semiconductor chip which are mounted on the chip-mounting substrates are formed in a same pattern, and which are laminated along a thickness direction, and one intermediate substrate which is arranged between the two chip-mounting substrates, and in which a plurality of interlayer connecting wirings electrically connected to each of the plurality of chip connecting wirings of the adjacent chip-mounting substrate are formed in a predetermined wiring pattern.

Abstract: A semiconductor device is disclosed which comprises a plurality of semiconductor chips having a plurality of terminals, two chip mounting bases on each of which at least one of the semiconductor chips is mounted and a plurality of chip interconnections electrically connected to the terminals of the mounted semiconductor chip are formed into substantially the same pattern and which are stacked in two layers, one interconnection base which is interposed between the two chip mounting bases and on which a plurality of intermediate interconnections electrically connected to the chip interconnections are formed into a pattern different from the pattern of the chip interconnections, and a plurality of interlevel interconnections which are formed in a plurality of through holes extending through the chip mounting bases and the interconnection base at once along a stacking direction and electrically connect the chip interconnections and the intermediate interconnections.

Abstract: There is disclosed a semiconductor device which comprises a first chip-mounting substrate on which at least one semiconductor chip having a plurality of terminals is mounted, and a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, a second chip-mounting substrate which is laminated on the first chip-mounting substrate and on which at least one semiconductor chip is mounted, a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, and at least one of the semiconductor chips has a center offset from a center of a whole arrangement of the relay terminals.

Abstract: There is disclosed a semiconductor device which comprises a first chip-mounting substrate on which at least one semiconductor chip having a plurality of terminals is mounted, and a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, a second chip-mounting substrate which is laminated on the first chip-mounting substrate and on which at least one semiconductor chip is mounted, a plurality of relay terminals electrically connected to the respective terminals of the semiconductor chip are disposed to surround a portion with the semiconductor chip mounted thereon from the outside in the vicinity of the portion, and at least one of the semiconductor chips has a center offset from a center of a whole arrangement of the relay terminals.

Abstract: There is disclosed a laminated-chip semiconductor device which comprises two chip-mounting substrates on each of which at least one semiconductor chip having a plurality of terminals for signals is mounted, and a plurality of chip connecting wirings electrically connected to the terminals for signals of the each semiconductor chip which are mounted on the chip-mounting substrates are formed in a same pattern, and which are laminated along a thickness direction, and one intermediate substrate which is arranged between the two chip-mounting substrates, and in which a plurality of interlayer connecting wirings electrically connected to each of the plurality of chip connecting wirings of the adjacent chip-mounting substrate are formed in a predetermined wiring pattern.

Abstract: An IC chip and overhang portions are stuck to tape by an adhesive agent layer having elasticity. A plurality of solder balls are attached to the tape. By soldering the solder balls to a printed board, a semiconductor device is mounted. In the case where a temperature cycle has been caused, thermal stress occurs between the IC chip and the printed board or between the hangover portion and the printed board because of a difference in coefficient of thermal expansion between the IC chip or the hangover portion and the printed board. However, this thermal stress is absorbed by the elasticity of the adhesive agent layer. As a result, little thermal stress is applied to solder balls. Even if the above described temperature cycle is repeated, therefore, the solder balls are electrically connected to the printed board stably over a long period of time. In addition, the area of the tape is widened by the area of the hangover portions.

Abstract: In the disclosed method of manufacturing semiconductor devices with a single-sided resin-sealed package structure, when resin is filled into between the chip and the substrate, the occurrence of variations in the finishing dimensions of the package or defects in the outward appearance of the package is prevented.