Abstract: The code error detecting method uses the code error detecting apparatus which comprises a sector buffer memory for storing various kinds of data, an adder circuit for performing exclusive OR addition of data, a CRC generator/checker for producing error check parities by dividing a result of addition performed in the adder circuit by a predetermined generator polynomial, a temporary memory for storing the error check parities, and an error correction circuit for calculating error correction parities which are used to correct an error of the data. At the time of recording, the data incorporating various parities produced in the code error detecting apparatus is recorded on an optical disk, and, at the time of reproducing, the data reproduced and stored in the sector buffer memory is corrected by using the reproduced error correction parities, and the error check parities are obtained by using the CRC generator/checker.