Abstract: There is provided an analysis apparatus 30 for analyzing test results of testing, by using a test apparatus, a plurality of devices under test having the same configuration. The analysis apparatus 30 includes: an acquiring unit 300 that acquires a judgment result of comparing, to an expected value, a value of data in storage read out for each flip-flop, the data having been stored as a result of scan testing onto flip-flops provided linked to one another by scan chain connection within the devices under test; a result storage unit 310 that stores the judgment result for each flip-flop in association with a position of the flip-flop in a scan chain; a composite unit 350 that generates a composite result in which a plurality of judgment results for the devices under test are combined with one another for each position in the scan chain; and a display unit 360 that displays the composite result.

Abstract: There is provided an analysis apparatus 30 for analyzing test results of testing, by using a test apparatus, a plurality of devices under test having the same configuration. The analysis apparatus 30 includes: an acquiring unit 300 that acquires a judgment result of comparing, to an expected value, a value of data in storage read out for each flip-flop, the data having been stored as a result of scan testing onto flip-flops provided linked to one another by scan chain connection within the devices under test; a result storage unit 310 that stores the judgment result for each flip-flop in association with a position of the flip-flop in a scan chain; a composite unit 350 that generates a composite result in which a plurality of judgment results for the devices under test are combined with one another for each position in the scan chain; and a display unit 360 that displays the composite result.

Abstract: A failure analyzing system for displaying a position of a failure in a semiconductor device, includes: a circuit position memory for storing physical positions of respective circuits included in the semiconductor device; a defective information acquisition unit for acquiring information on a defective circuit included in the semiconductor device; and a display for displaying the defective circuit on a layout of the semiconductor device with a color that is different between the physical positions.

Abstract: A failure analyzing system for displaying a position of a failure in a semiconductor device, includes: a circuit position memory for storing physical positions of respective circuits included in the semiconductor device; a defective information acquisition unit for acquiring information on a defective circuit included in the semiconductor device; and a display for displaying the defective circuit on a layout of the semiconductor device with a color that is different between the physical positions.