Patents by Inventor Katsumi Akabane

Katsumi Akabane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5003369
    Abstract: A thyristor of the overvoltage self-protection type capable of performing a turn-on operation certainly without being damaged even when an overvoltage is applied across the thyristor is disclosed in which a P-base layer is provided with a recess having such a depth as to generate an avalanche in the vicinity of the bottom of the recess when the overvoltage is applied across the thyristor, and a portion of a P.sup.+ -layer formed on the surface of the recess is kept in contact with an N-emitter layer.
    Type: Grant
    Filed: April 14, 1988
    Date of Patent: March 26, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Kazuyoshi Kanda, Katsumi Akabane, Tadashi Sakaue
  • Patent number: 4236169
    Abstract: A semiconductor substrate comprises at the central portion a diode region which includes a P-type base layer, an N-type low impurity concentration layer and an N-type base layer and at the outer peripheral portion a thyristor region which includes an N-type emitter layer, a P-type base layer, an N-type low impurity concentration layer, an N-type base layer and a P-type emitter layer. The P-type base layer and the N-type emitter layer are in contact with a cathode electrode, the N-type base layer and the P-type emitter layer are in contact with an anode electrode, and the diode and thyristor regions are connected in anti-parallel. Contiguous to the outer periphery of the N-type base layer interposed between the N-type low impurity concentration layer and the P-type emitter layer is formed an N-type high impurity concentration region higher in impurity concentration than the N-type base layer.
    Type: Grant
    Filed: June 19, 1979
    Date of Patent: November 25, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Yoichi Nakashima, Yosikazu Takita, Sousi Suzuki, Katsumi Akabane, Michihiro Misawa
  • Patent number: 4210924
    Abstract: A semiconductor controlled rectifier comprises a semiconductor substrate having four layers of alternate n- and p-type conductivities and includes two main surfaces one of which is formed of the exposed surface of first and second layers and the other of which is formed of the exposed surface of a fourth layer. A gate electrode of a rectangular shape is disposed on the second layer on the one main surface and a cathode electrode is disposed on the first layer so as to extend along at least two sides of the rectangular gate electrode. The cathode electrode portion extending along the short side of the rectangular gate extends slightly beyond a p-n junction defined between the first and second layers, so as to be in ohmic contact with the second layer.
    Type: Grant
    Filed: September 12, 1978
    Date of Patent: July 1, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Katsumi Akabane, Isao Kojima, Yoshikazu Takita, Soushi Suzuki, Yasuhiko Ikeda, Koichi Wajima, Yoshio Terasawa
  • Patent number: 4028721
    Abstract: A semiconductor controlled rectifying device comprising a semiconductor substrate having four layers of PNPN, a couple of main electrodes in ohmic contact with the outside ones of the four layers respectively, a gate electrode provided on the intermediate P layer, an N-type minor region formed in the intermediate P layer in the vicinity of the gate electrode, and a conductor in contact with part of the outside N layer and with the minor region and disposed along the outer periphery of the outside N layer on the intermediate P layer.
    Type: Grant
    Filed: July 22, 1974
    Date of Patent: June 7, 1977
    Assignee: Hitachi, Ltd.
    Inventors: Tsutomu Yatsuo, Katsumi Akabane