Abstract: An information processing apparatus is composed of an input layer, a hidden layer and an output layer, and performs a computation in terms of neuron models. In the information processing apparatus, a forward network comprising the input layer, the hidden layer and the output layer executes a computation for externally input data to determine the values of outputs therefrom, and a backward network comprising the output layer and the hidden layer executes computation for output values expected for given inputs to determine learning signal values. The information processing apparatus transfers the output values and learning values between the forward network and the backward network to modify the synapse weights of the neuron models.

Abstract: A general neuro-computer and system using it is capable of executing a plurality of learning algorithms, providing an instruction execution speed comparable with a hard wired system, and practically neglecting a time required for rewriting microprograms. The neuro-computer is constituted by a neuron array having a plurality of neurons, a control storage unit for storing microinstructions, a parameter register, a control logic, and a global memory. A host computer as a user interface inputs information necessary for the learning and execution of the neuro-computer to the system, the information including learning algorithms, neural network architecture, the number of learnings, the number of input patterns, input signals, and desired signals. The information inputted from the host computer is transferred via a SCSI to the neuro-computer to perform a desired neural network operation.

Abstract: A semiconductor integrated circuit device includes a plurality of integrated circuit chips and a large-sized integrated circuit element on which the plurality of integrated circuit chips are mounted. The large-sized integrated circuit element includes a logic circuit for electrically interconnecting the integrated circuit chips mounted on it. The logic circuit provided within the large-sized integrated circuit element includes a control circuit for controlling a connection relation between the integrated circuit chips mounted on the large-sized integrated circuit element. Further, the logic circuit includes buffer or latch circuits for relaying signals transmitted between the integrated circuit chips.

Abstract: An information processing apparatus which includes an input layer, a hidden layer and an output layer, and performs a computation in terms of models of neurons. A forward network, having the input layer, the hidden layer and the output layer, executes a computation for externally input data to determine the values of outputs therefrom, and a backward network, having the output layer and the hidden layer, executes computation for output values expected for given inputs to determine learning signal values. The information processing apparatus transfers the output values and learning values between the forward network and the backward network to modify the synapse weights of the neuron models.