Patents by Inventor Katsunori Asai

Katsunori Asai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for manufacturing semiconductor device
    Patent number: 6256875
    Abstract: The minimum spacing between wires disposed on a printed circuit board of a printed circuit board ball grid array package is reduced. Wiring layers are narrower than in the prior art because they are not plated and because only one metal layer is plated on the wiring layers. The narrower wiring layers can be formed easily with small spaces between wires.
    Type: Grant
    Filed: September 22, 1999
    Date of Patent: July 10, 2001
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Masaki Watanabe, Akiyoshi Sawai, Yoshikazu Narutaki, Tomoaki Hashimoto, Masatoshi Yasunaga, Jun Shibata, Hiroshi Seki, Kazuhiko Kurafuchi, Katsunori Asai
  • Package for semiconductor device laminated printed circuit boards
    Patent number: 6005289
    Abstract: The minimum spacing between wires disposed on a printed circuit board of a printed circuit board ball grid array package is reduced. Wiring layers are narrower than in the prior art because they are not plated and because only one metal layer is plated on the wiring layers. The narrower wiring layers can be formed easily with small spaces between wires.
    Type: Grant
    Filed: October 24, 1996
    Date of Patent: December 21, 1999
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Masaki Watanabe, Akiyoshi Sawai, Yoshikazu Narutaki, Tomoaki Hashimoto, Masatoshi Yasunaga, Jun Shibata, Hiroshi Seki, Kazuhiko Kurafuchi, Katsunori Asai
  • Packaged semiconductor chip
    Patent number: 5814883
    Abstract: A semiconductor device includes a substrate having a recess; a semiconductor chip disposed in the recess; a plurality of external electrodes disposed on the substrate; a lid covering the recess; and a heat radiator disposed between the semiconductor chip and the substrate for transmitting heat generated by the semiconductor chip to the substrate for radiation.
    Type: Grant
    Filed: May 1, 1996
    Date of Patent: September 29, 1998
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Eengineering Corporation
    Inventors: Akiyoshi Sawai, Kisamitsu Ono, Hideyuki Ichiyama, Katsunori Asai
  • Flip chip semiconductor device
    Patent number: 5666008
    Abstract: A semiconductor device for life enhancement of electrical connections between a semiconductor chip and a mounting substrate. Protruding electrodes, each including a bump electrode and a land electrode, are located on the lower surface of an LSI chip. The bump electrodes are substantially spherical and have a first thickness. Connecting terminals of substantially spherical configuration and having a second thickness are directly connected to corresponding land electrodes by melting. Connecting patterns are located on the upper surface of a wiring board which is larger in area than the LSI chip in plan configuration, and external electrodes, each including a connecting pattern and an external electrode, are located on the lower surface of the wiring board. The external electrodes are substantially spherical and have a third thickness. The connecting patterns are directly connected to corresponding connecting terminals, respectively, by melting.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: September 9, 1997
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Yoshihiro Tomita, Akiyoshi Sawai, Katsunori Asai