Abstract: An electromagnetic wave transmission cable for transmitting an electromagnetic wave comprises a hollow waveguide tube and a foamed resin member. The hollowing waveguide tube includes a hollow dielectric layer formed in a tubular shape. The foamed resin member is provided over a predetermined length in a longitudinal direction of the hollow waveguide tube and covers a surface of the dielectric layer to surround an outer periphery of the hollow waveguide tube.

Abstract: An electromagnetic wave transmission cable for transmitting an electromagnetic wave comprises a hollow waveguide tube and a foamed resin member. The hollowing waveguide tube includes a hollow dielectric layer formed in a tubular shape. The foamed resin member is provided over a predetermined length in a longitudinal direction of the hollow waveguide tube and covers a surface of the dielectric layer to surround an outer periphery of the hollow waveguide tube.

Abstract: In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to 1/100 or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.

Abstract: In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to 1/100 or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.

Abstract: In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to {fraction (1/100)} or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.

Abstract: In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to {fraction (1/100)} or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.

Abstract: In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to {fraction (1/100)} or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.