Abstract: Methods and circuits for transmitting data are disclosed. An embodiment of a method includes transmitting a predetermined number of pulses during predetermined period of time. A first predetermined number of pulses transmitted during the predetermined period of time represents a first value and a second predetermined number of pulses transmitted during the predetermined period of time represents a second value.

Abstract: Methods and circuits for transmitting data are disclosed. An embodiment of a method includes transmitting a predetermined number of pulses during predetermined period of time. A first predetermined number of pulses transmitted during the predetermined period of time represents a first value and a second predetermined number of pulses transmitted during the predetermined period of time represents a second value.

Abstract: Methods and circuits for transmitting data are disclosed. An embodiment of a method includes transmitting a predetermined number of pulses during predetermined period of time. A first predetermined number of pulses transmitted during the predetermined period of time represents a first value and a second predetermined number of pulses transmitted during the predetermined period of time represents a second value.

Abstract: One aspect of the present invention includes a light-emitting diode (LED) power supply system. The system includes an LED regulator configured to monitor at least one LED voltage associated with a respective at least one activated LED string and to generate an LED regulation voltage based on the at least one LED voltage relative to an LED power voltage that provides power to the at least one activated LED string. The system also includes a power converter configured to generate the LED power voltage and to regulate the LED power voltage based on the LED regulation voltage.

Abstract: A power supply circuit with low noise and low power consumption and a battery device using the power supply circuit. If a voltage VDD is higher than a prescribed voltage, a charge pump circuit 140A is operated in “½ mode” (a step-down ratio of “2”), steps down the voltage VDD, and outputs an intermediate voltage VCPO. Since the voltage VDD is stepped down, the intermediate voltage VCPO being input into a first LDO 135 is about half the case where no step-down is carried out, and the power being consumed in a MOS transistor Q11 (FIG. 3) of the first LDO 135 is greatly reduced. Therefore, the increase in power consumption of the first LDO 135 due to a voltage increase in the voltage VDD can be suppressed. Also, since the heat sink of the first LDO 135 can be reduced in size or omitted by the suppression of power consumption, the size and weight of the device can be reduced.

Abstract: One aspect of the present invention includes a light-emitting diode (LED) power supply system. The system includes an LED regulator configured to monitor at least one LED voltage associated with a respective at least one activated LED string and to generate an LED regulation voltage based on the at least one LED voltage relative to an LED power voltage that provides power to the at least one activated LED string. The system also includes a power converter configured to generate the LED power voltage and to regulate the LED power voltage based on the LED regulation voltage.

Abstract: A voltage converting circuit and a battery device, aimed at the problem that the breakdown voltage required for the driving input of the selected switch element is increased as the potential of the selected power storage device is increased when a power storage device is selected from a plurality of power storage devices that are connected in series. A certain drive voltage for turning on p-type MOS transistors Q3, Q4 of selection circuit 121 is generated based on a certain drive current Ion flowing from one power storage element to ground level GND. In other words, even if the power storage device selected by selection circuit 121 has a high potential with respect to ground level GND, the drive voltage applied between the gate and source of MOS transistors Q3, Q4 can be held substantially constant.

Abstract: A voltage converting circuit and a battery device, aimed at the problem that the breakdown voltage required for the driving input of the selected switch element is increased as the potential of the selected power storage device is increased when a power storage device is selected from a plurality of power storage devices that are connected in series. A certain drive voltage for turning on p-type MOS transistors Q3, Q4 of selection circuit 121 is generated based on a certain drive current Ion flowing from one power storage element to ground level GND. In other words, even if the power storage device selected by selection circuit 121 has a high potential with respect to ground level GND, the drive voltage applied between the gate and source of MOS transistors Q3, Q4 can be held substantially constant.

Abstract: This invention provides a battery protecting circuit where even if the battery voltage falls nearly to zero volts due to overdischarge or the like while an NMOS transistor set in the power feeding path on the side of the positive electrode of the battery is turned ON/OFF, it is still possible to charge the battery by a constant charging current in a stable way. When the voltage of battery B1 has not reached the voltage needed for generating the driving voltage of NMOS transistors Q1, Q2 in drives 111, 112, the boosting operation of drives 111, 112 is stopped, and PMOS transistor Q3 inserted in a power feeding path different from that of said transistors is turned ON by driver 113. In driver 113, by clamping voltage VDD generated in the power feeding path of PMOS transistor Q3 to a voltage lower than it, driving voltage ZVO of PMOS transistor Q3 is generated without performing a boosting operation.

Abstract: A power supply circuit with low noise and low power consumption and a battery device using the power supply circuit. If a voltage VDD is higher than a prescribed voltage, a charge pump circuit 140A is operated in “½ mode” (a step-down ratio of “2”), steps down the voltage VDD, and outputs an intermediate voltage VCPO. Since the voltage VDD is stepped down, the intermediate voltage VCPO being input into a first LDO 135 is about half the case where no step-down is carried out, and the power being consumed in a MOS transistor Q11 (FIG. 3) of the first LDO 135 is greatly reduced. Therefore, the increase in power consumption of the first LDO 135 due to a voltage increase in the voltage VDD can be suppressed. Also, since the heat sink of the first LDO 135 can be reduced in size or omitted by the suppression of power consumption, the size and weight of the device can be reduced.

Abstract: A primary current circuit 42 that outputs a primary current IPTAT proportional to the primary coefficient of temperature, secondary current circuit 43 outputs a secondary current IPTAT2 proportional to the Nth (N: an integer of 2 or larger) coefficient of temperature based on the primary current, constant current source 41 that supplies current to the primary and secondary currents, and power control switch Q11 that shuts down the voltage supply based on a rise in the secondary current.

Abstract: This invention provides a battery protecting circuit where even if the battery voltage falls nearly to zero volts due to overdischarge or the like while an NMOS transistor set in the power feeding path on the side of the positive electrode of the battery is turned ON/OFF, it is still possible to charge the battery by a constant charging current in a stable way. When the voltage of battery B1 has not reached the voltage needed for generating the driving voltage of NMOS transistors Q1, Q2 in drives 111, 112, the boosting operation of drives 111, 112 is stopped, and PMOS transistor Q3 inserted in a power feeding path different from that of said transistors is turned ON by driver 113. In driver 113, by clamping voltage VDD generated in the power feeding path of PMOS transistor Q3 to a voltage lower than it, driving voltage ZVO of PMOS transistor Q3 is generated without performing a boosting operation.

Abstract: A primary current circuit 42 that outputs a primary current IPTAT proportional to the primary coefficient of temperature, secondary current circuit 43 outputs a secondary current IPTAT2 proportional to the Nth (N: an integer of 2 or larger) coefficient of temperature based on the primary current, constant current source 41 that supplies current to the primary and secondary currents, and power control switch Q11 that shuts down the voltage supply based on a rise in the secondary current.

Abstract: A protection of battery system having battery cells Cell1˜Cell3, FET switches SW1, SW2 that are connected to the high-side path and control on/off state of the path, as well as fuse F1 for cutting said path, primary protection circuits 31˜34 that detect abnormalities in charging/discharging of the battery cells and turn the FET switches off, and secondary protecting controller 38 that detect abnormalities in charging/discharging of the battery cells and controls the operation of fuse F1. Secondary protecting controller 38 controls fuse F1 if there is no tendency to a decrease in abnormalities after a prescribed period of time after control of the FET switch.

Abstract: A protection of battery system having battery cells Cell1˜Cell3, FET switches SW1, SW2 that are connected to the high-side path and control on/off state of the path, as well as fuse F1 for cutting said path, primary protection circuits 31˜34 that detect abnormalities in charging/discharging of the battery cells and turn the FET switches off, and secondary protecting controller 38 that detect abnormalities in charging/discharging of the battery cells and controls the operation of fuse F1. Secondary protecting controller 38 controls fuse F1 if there is no tendency to a decrease in abnormalities after a prescribed period of time after control of the FET switch.