Patents by Inventor Katsuya Fukase

Katsuya Fukase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11289403
    Abstract: A multi-layer substrate includes: a first insulating layer; a conductor layer that is provided on an upper surface of the first insulating layer and that has a penetrating portion; a second insulating layer that covers the conductor layer and that is stacked on the upper surface of the first insulating layer; a via hole that penetrates the second insulating layer from an upper surface of the second insulating layer to reach an inside of the first insulating layer and that includes the penetrating portion; and an insulating member with which the via hole is filled. The conductor layer has a portion exposed in the via hole, and the insulating member covers an upper surface and a lower surface of the conductor layer exposed in the via hole through the penetrating portion of the conductor layer.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: March 29, 2022
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Misaki Komatsu, Katsuya Fukase
  • Patent number: 11152293
    Abstract: A wiring board includes an insulating layer including a first insulating film provided with a first surface and a second surface that is opposite to the first surface, and composed of only resin, and a second insulating film provided with a first surface and a second surface that is opposite to the first surface, including a reinforcing member and resin, in which the reinforcing member is impregnated with the resin, and stacked on the first surface of the first insulating film such that the second surface of the second insulating film contacts the first surface of the first insulating film and the second surface of the first insulating film is exposed outside; and a first wiring layer embedded in the first insulating film, a predetermined surface of the first wiring layer being exposed from the second surface of the first insulating film.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: October 19, 2021
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kazuhiro Oshima, Hiroharu Yanagisawa, Kazuhiro Kobayashi, Katsuya Fukase, Ken Miyairi
  • Patent number: 10892217
    Abstract: A wiring substrate includes first wiring portions, an insulation layer covering the first wiring portions, openings extending through the insulation layer in a thickness-wise direction, partially exposing upper surfaces of the first wiring portions, and differing from each other in capacity, and second wiring portions, each of which includes a via wiring filling one of the openings and a columnar connection terminal electrically connected to the via wiring and arranged on an upper surface of the insulation layer. The via wiring includes an electrolytic plated layer and an electroless plating structure including N layers (N is integer and ?0) arranged between the electrolytic plated layer and the upper surface of the first wiring portion exposed in a bottom of the opening. The via wiring is formed so that the electroless plating structure has a thickness that increases as a capacity of the opening filled with the via wiring is increased.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: January 12, 2021
    Inventors: Takashi Arai, Fumimasa Katagiri, Katsuya Fukase
  • Publication number: 20200219794
    Abstract: A multi-layer substrate includes: a first insulating layer; a conductor layer that is provided on an upper surface of the first insulating layer and that has a penetrating portion; a second insulating layer that covers the conductor layer and that is stacked on the upper surface of the first insulating layer; a via hole that penetrates the second insulating layer from an upper surface of the second insulating layer to reach an inside of the first insulating layer and that includes the penetrating portion; and an insulating member with which the via hole is filled. The conductor layer has a portion exposed in the via hole, and the insulating member covers an upper surface and a lower surface of the conductor layer exposed in the via hole through the penetrating portion of the conductor layer.
    Type: Application
    Filed: December 27, 2019
    Publication date: July 9, 2020
    Inventors: Misaki Komatsu, Katsuya Fukase
  • Patent number: 10707178
    Abstract: A wiring substrate includes: a wiring member that includes a first surface and a second surface, the wiring member including a plurality of wiring layers between the first surface and the second surface; and a carrier that is bonded to the first surface via an adhesive and that includes a plurality of layers whose coefficients of thermal expansion are different from each other. A pitch of wires included in the plurality of wiring layers is narrower on the second surface side than on the first surface side. When being heated, a direction in which the wiring member tends to warp and a direction in which the carrier tends to warp are opposite.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: July 7, 2020
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Junji Sato, Katsuya Fukase
  • Publication number: 20200105651
    Abstract: A wiring board includes an insulating layer including a first insulating film provided with a first surface and a second surface that is opposite to the first surface, and composed of only resin, and a second insulating film provided with a first surface and a second surface that is opposite to the first surface, including a reinforcing member and resin, in which the reinforcing member is impregnated with the resin, and stacked on the first surface of the first insulating film such that the second surface of the second insulating film contacts the first surface of the first insulating film and the second surface of the first insulating film is exposed outside; and a first wiring layer embedded in the first insulating film, a predetermined surface of the first wiring layer being exposed from the second surface of the first insulating film.
    Type: Application
    Filed: December 3, 2019
    Publication date: April 2, 2020
    Inventors: Kazuhiro OSHIMA, Hiroharu YANAGISAWA, Kazuhiro KOBAYASHI, Katsuya FUKASE, Ken MIYAIRI
  • Publication number: 20200043841
    Abstract: A wiring substrate includes first wiring portions, an insulation layer covering the first wiring portions, openings extending through the insulation layer in a thickness-wise direction, partially exposing upper surfaces of the first wiring portions, and differing from each other in capacity, and second wiring portions, each of which includes a via wiring filling one of the openings and a columnar connection terminal electrically connected to the via wiring and arranged on an upper surface of the insulation layer. The via wiring includes an electrolytic plated layer and an electroless plating structure including N layers (N is integer and ?0) arranged between the electrolytic plated layer and the upper surface of the first wiring portion exposed in a bottom of the opening. The via wiring is formed so that the electroless plating structure has a thickness that increases as a capacity of the opening filled with the via wiring is increased.
    Type: Application
    Filed: July 26, 2019
    Publication date: February 6, 2020
    Inventors: Takashi ARAI, Fumimasa KATAGIRI, Katsuya FUKASE
  • Patent number: 10510638
    Abstract: There is provided an electronic component-embedded board. The electronic component-embedded board includes: a first insulating layer; a metal layer formed on the first insulating layer; a first electronic component disposed on the metal layer; a second insulating layer formed on the first insulating layer and the metal layer such that the first electronic component is buried in the second insulating layer; a second electronic component disposed above the second insulating layer; and a heat radiating member thermally connected to the metal layer exposed from the second insulating layer and thermally connected to the second electronic component.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: December 17, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Shigeru Mizuno, Tomoya Kubo, Katsuya Fukase
  • Publication number: 20190378804
    Abstract: A wiring substrate includes: a wiring member that includes a first surface and a second surface, the wiring member including a plurality of wiring layers between the first surface and the second surface; and a carrier that is bonded to the first surface via an adhesive and that includes a plurality of layers whose coefficients of thermal expansion are different from each other. A pitch of wires included in the plurality of wiring layers is narrower on the second surface side than on the first surface side. When being heated, a direction in which the wiring member tends to warp and a direction in which the carrier tends to warp are opposite.
    Type: Application
    Filed: May 28, 2019
    Publication date: December 12, 2019
    Inventors: Junji SATO, Katsuya FUKASE
  • Patent number: 10398027
    Abstract: A wiring board includes: a wiring structure including: a first insulating layer; a first wiring layer formed on a bottom surface of the first insulating layer; and a protective insulating layer which covers the bottom surface of the first insulating layer and has a first opening; and a support base member bonded to the protective insulating layer with an adhesive layer and has a second opening. A diameter of the second opening at a position between the top surface and the bottom surface of the support base member in a thickness direction of the support base member is smaller than a diameter of the second opening at the top surface of the support base member and a diameter of the second opening at the bottom surface of the support base member, and smaller than a diameter of the first opening.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: August 27, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Kazuhiro Oshima, Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Patent number: 10340214
    Abstract: A carrier base material-added wiring substrate includes a wiring substrate and a carrier base material. The wiring substrate includes an insulation layer, a wiring layer arranged on a lower surface of the insulation layer, and a solder resist layer that covers the lower surface of the insulation layer and includes an opening that exposes a portion of the wiring layer as an external connection terminal. The carrier base material is adhered by an adhesive layer to the solder resist layer. The carrier base material includes an opening that is in communication with the opening of the solder resist layer and exposes the external connection terminal. The opening of the carrier base material has a diameter that is smaller than that of the opening of the solder resist layer.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: July 2, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Publication number: 20190181084
    Abstract: A wiring board includes: a wiring structure including: a first insulating layer; a first wiring layer formed on a bottom surface of the first insulating layer; and a protective insulating layer which covers the bottom surface of the first insulating layer and has a first opening; and a support base member bonded to the protective insulating layer with an adhesive layer and has a second opening. A diameter of the second opening at a position between the top surface and the bottom surface of the support base member in a thickness direction of the support base member is smaller than a diameter of the second opening at the top surface of the support base member and a diameter of the second opening at the bottom surface of the support base member, and smaller than a diameter of the first opening.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 13, 2019
    Inventors: Kazuhiro Oshima, Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Patent number: 10321574
    Abstract: An electronic component-embedded substrate includes a core substrate, a cavity penetrating the core substrate, a wiring layer formed on one surface of the core substrate, a support pattern extending over the cavity and configured to divide the cavity into a plurality of component embedding areas, an insulation wall portion arranged on a part of the support pattern in the cavity and formed of the same material as the core substrate, a plurality of electronic components each of which is mounted in each of the plurality of component embedding areas, and an insulating material filling an inside of the cavity.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: June 11, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Junji Sato, Katsuya Fukase
  • Publication number: 20190103335
    Abstract: There is provided an electronic component-embedded board. The electronic component-embedded board includes: a first insulating layer; a metal layer formed on the first insulating layer; a first electronic component disposed on the metal layer; a second insulating layer formed on the first insulating layer and the metal layer such that the first electronic component is buried in the second insulating layer; a second electronic component disposed above the second insulating layer; and a heat radiating member thermally connected to the metal layer exposed from the second insulating layer and thermally connected to the second electronic component.
    Type: Application
    Filed: September 21, 2018
    Publication date: April 4, 2019
    Inventors: Shigeru Mizuno, Tomoya Kubo, Katsuya Fukase
  • Patent number: 10109580
    Abstract: A wiring board includes a single-layer insulating layer, and a single-layer interconnect layer embedded in the insulating layer, wherein an entirety of a first surface of the interconnect layer is exposed in a recessed position relative to a first surface of the insulating layer, and a second surface of the interconnect layer is partially exposed in a recessed position relative to a second surface of the insulating layer.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: October 23, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Shunichiro Matsumoto, Hitoshi Kondo, Katsuya Fukase
  • Patent number: 10080292
    Abstract: A wiring board includes an electronic component; an insulating layer containing the electronic component therein, and including a via hole that is open at one surface of the insulating layer to expose an electrode of the electronic component; a first wiring layer embedded in the insulating layer, one surface of the first wiring layer being exposed at the one surface of the insulating layer; a second wiring layer including a wiring pattern formed on the one surface of the first wiring layer, and a via wiring extended from the wiring pattern to be extended in the via hole and directly connected to an electrode of the electronic component.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: September 18, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Junji Sato, Hitoshi Kondo, Katsuya Fukase
  • Patent number: 10080293
    Abstract: An electronic component-embedded board includes: a core substrate; a cavity which penetrates the core substrate; a wiring layer formed on one face of the core substrate; a component mounting pattern formed of the same material as the wiring layer and laid across the cavity to partition the cavity into through holes in plan view; an electronic component mounted on the component mounting pattern and arranged inside the cavity; a first insulating layer formed on the one face of the core substrate to cover one face of the electronic component; and a second insulating layer formed on the other face of the core substrate to cover the other face of the electronic component. The cavity is filled with the first insulating layer and the second insulating layer.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: September 18, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Junji Sato, Katsuya Fukase
  • Patent number: 9966331
    Abstract: The wiring substrate includes an insulation layer that includes a lower surface, an upper surface, and an intermediate surface located between the lower surface and the upper surface. A first wiring layer is formed on the lower surface of the insulation layer. A second wiring layer is formed on the intermediate surface of the insulation layer. A recess is formed in the upper surface of the insulation layer. The recess overlaps, in a plan view, a first through hole that extends through the insulation layer. The first through hole is filled with a via wiring, which is formed integrally with the first wiring layer. A bump is formed integrally with the via wiring and projected into the recess. An upper end surface of the bump is located above an upper surface of the second wiring layer.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: May 8, 2018
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Takayuki Ota, Hiroharu Yanagisawa, Katsuya Fukase
  • Patent number: 9961785
    Abstract: A wiring substrate includes a core, a first wiring layer formed on a first surface of the core, and a second wiring layer formed on a second surface of the core. The first wiring layer includes a first opening, and the second wiring layer includes a second opening. The core includes a plurality of electronic component accommodating bores that extend through the core at portions exposed from the first and second openings. An electronic component is arranged in each electronic component accommodating bore. The electronic component accommodating bores are filled with an insulating layer. The core includes a partition located between adjacent electronic component accommodating bores. The partition is formed by part of the core.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: May 1, 2018
    Assignee: Shinko Electric Co., Ltd.
    Inventors: Junji Sato, Kiyotaka Mochizuki, Kazuhiro Kobayashi, Katsuya Fukase
  • Patent number: 9961767
    Abstract: A circuit board includes an insulating layer including first and second insulator films, a first wiring layer embedded in the first insulator film and including pads and first wiring patterns exposed from the first insulator film, and a second wiring layer including second wiring patterns formed on the second insulator film and via wirings penetrating the insulating layer and electrically connecting the second wiring patterns to the first wiring layer. The first insulator film is made of a reinforcement-free resin that includes no reinforcing member. The second insulator film is made of a reinforcing member impregnated with a resin.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: May 1, 2018
    Assignee: SHINKO ELECTRIC INDUSTIRES CO., LTD.
    Inventors: Kazuhiro Oshima, Hiroharu Yanagisawa, Kazuhiro Kobayashi, Katsuya Fukase, Ken Miyairi