Abstract: Two charge transfer passages of one TFT, which comprise two areas with island layers of p-Si intersecting at right angles and running from respective drain areas ND, PD to source areas NS, PS through an LD area LD and a channel area CH, are arranged non-parallel to each other. Even if a defective crystallization area R, which is caused due to uneven intensity in an irradiated area in laser annealing for forming p-Si of a p-Si TFT LCD, passes across the TFT area, and either of the transfer passages is defective, the remaining one operates normally, and the component characteristics are maintained as desired.

Abstract: Two charge transfer passages of one TFT, which comprise two areas with island layers of p-Si intersecting at right angles and running from respective drain areas ND, PD to source areas NS, PS through an LD area LD and a channel area CH, are arranged non-parallel to each other. Even if a defective crystallization area R, which is caused due to uneven intensity in an irradiated area in laser annealing for forming p-Si of a p-Si TFT LCD, passes across the TFT area, and either of the transfer passages is defective, the remaining one operates normally, and the component characteristics are maintained as desired.

Abstract: In a driver built-in type p-Si TFT LCD, a channel width direction of a sampling TFT (6) constituting a part of a driver and having a large channel width is formed in a direction non-parallel with sides of a substrate or sides of pulse laser beams radiated for poly-crystallization of a-Si. For example, the channel width direction of the sampling TFT (6) is formed to have an angle of 45° relative to the substrate sides. Therefore, even when a dispersion in energy intensity is generated in an irradiated plane of pulse laser beams radiated to a-Si in a poly-crystallization process and a defective crystallized region [R] is formed on a p-Si film (13) in a direction corresponding to the dispersion, the defective crystallized region [R] extends across a part of each TFT (6). Formation of only a specified TFT (6) in the defective crystallized region [R] and occurrence of a difference in characteristics between the specified TFT and another TFT (6) are prevented.

Abstract: A shift register circuit includes a plurality of shift register blocks and a plurality of connecting sections that belong to a plurality of signal shifting systems. Each of the shift register blocks includes a plurality of shift register groups, each of which belongs to the plurality of signal shifting systems. Each of the connecting sections is provided to mutually connect the shift register groups belonging to the associated signal shifting system. The plurality of shift register blocks and the plurality of connecting sections are arranged in a line in the shift register circuit. Further, the plurality of connecting sections are separated by at least two connecting section groups in that line arrangement with at least one of the shift register blocks located between the connecting section groups.

Abstract: A shift register has four systems of shift registers for bidirectional scans and normal/redundant lines. The respective systems of shift registers are divided into blocks, so that transmission circuits are provided therebetween. The transmission circuits form switching circuits through transfer gates. The transmission circuits receive output signals from both of the shift registers for the normal/redundant lines, and output only normal output signals to next stage shift registers in accordance with control signals.