Patents by Inventor Katsuyoshi Suzuki

Katsuyoshi Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240063027
    Abstract: The present invention is a method for producing an epitaxial wafer forming a single crystal silicon layer on a single crystal silicon wafer, comprising, a step of removing native oxide film on surface of the single crystal silicon wafer with hydrofluoric acid, a step of forming an oxygen atomic layer on the surface of the single crystal silicon wafer from which the native oxide film has been removed, a step of epitaxially growing the single crystal silicon layer on the surface of the single crystal silicon wafer on which the oxygen atomic layer is formed, wherein the plane concentration of oxygen in the oxygen atomic layer is 1×1015 atoms/cm2 or less. As a result, a method for producing an epitaxial wafer, that an oxygen atomic layer can be stably and simply introduced into an epitaxial layer, and having a good-quality single crystal silicon epitaxial layer is provided.
    Type: Application
    Filed: December 6, 2021
    Publication date: February 22, 2024
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Katsuyoshi SUZUKI
  • Patent number: 11779278
    Abstract: An internal device (1) is implanted in a living body (300). A control section (6) causes a communication section (5) to wirelessly transmit data corresponding to electroencephalogram signals of the living body (300) which are detected through a group of N (N is 2 or more) electrodes, to an external device (200). When the communication section (5) receives a designation signal designating a group of M electrode(s) (2a), M being smaller than N, the communication section (5) is caused to transmit data corresponding to electroencephalogram signals of the living body (300) which are detected through the group of M electrode(s) (2a), to the external device (200) in real time.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: October 10, 2023
    Assignees: NIHON KOHDEN CORPORATION, OSAKA UNIVERSITY, NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY, SPChange, LLC.
    Inventors: Kaoru Imajo, Katsuyoshi Suzuki, Masayuki Hirata, Seiji Kameda, Takafumi Suzuki, Hiroshi Ando, Takatsugu Kamata
  • Publication number: 20230204669
    Abstract: According to an embodiment, an information processing apparatus includes one or more hardware processors configured to calculate a prediction value of an amount of electric power consumed for a movement to be predicted, based on a prediction model in which the amount of electric power consumed by a moving object is an objective variable, one or more factor values that affect the amount of electric power consumed for the movement of the moving object to be predicted, and an error between the prediction value obtained by the prediction model and an actual measured value.
    Type: Application
    Filed: March 2, 2023
    Publication date: June 29, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Arika FUKUSHIMA, Katsuyoshi SUZUKI
  • Publication number: 20230094927
    Abstract: A fluid balance management system includes: a detection device configured to output a detection signal corresponding to a load applied to a bed in which a subject is present; a prediction device configured to acquire load variation information indicating a variation over time of the load based on the detection signal, and predict an event that causes variation in fluid balance of the subject from the load variation information; and an output device configured to output prediction information corresponding to a prediction result of the event.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 30, 2023
    Applicant: NIHON KOHDEN CORPORATION
    Inventors: Takuya KAWASHIMA, Wataru MATSUZAWA, Hiroto SANO, Katsuyoshi SUZUKI, Yoshihiro TAKAYANAGI
  • Publication number: 20230028127
    Abstract: A method for manufacturing an epitaxial wafer by forming a single crystal silicon layer on a wafer containing a group IV element including silicon, the method including the steps of: removing a natural oxide film on a surface of the wafer containing the group IV element including silicon in an atmosphere containing hydrogen; forming an oxygen atomic layer by oxidizing the wafer after removing the natural oxide film; and forming a single crystal silicon by epitaxial growth on the surface of the wafer after forming the oxygen atomic layer, where a planar density of oxygen in the oxygen atomic layer is set to 4×1014 atoms/cm2 or less. A method for manufacturing an epitaxial wafer having an epitaxial layer of good-quality single crystal silicon while also allowing the introduction of an oxygen atomic layer in an epitaxial layer stably and simply.
    Type: Application
    Filed: November 24, 2020
    Publication date: January 26, 2023
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Katsuyoshi SUZUKI, Atsushi SUZUKI
  • Patent number: 10886129
    Abstract: A method for manufacturing a semiconductor device, including forming a Fin structure on a semiconductor silicon substrate, performing ion implantation into the Fin structure, and subsequently performing recovery heat treatment on the semiconductor silicon substrate to recrystallize silicon of the Fin structure, wherein the Fin structure is processed so as not to have an end face of a {111} plane of the semiconductor silicon onto a sidewall of the Fin structure to be formed. It also includes a method for manufacturing a semiconductor device that is capable of preventing a defect from being introduced into a Fin structure when the Fin structure is subjected to ion implantation and recovery heat treatment.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: January 5, 2021
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Tsuyoshi Ohtsuki, Tadashi Nakasugi, Hiroshi Takeno, Katsuyoshi Suzuki
  • Publication number: 20200382048
    Abstract: The present invention provides a thermal radiation light source that allows a wider range of material choices than those of conventional techniques, so that light having a desired peak wavelength can easily be obtained. A thermal radiation light source 10 includes a thermo-optical converter made of an optical structure in which a refractive index distribution is formed in a member 11 made of an intrinsic semiconductor so as to resonate with light of a shorter wavelength than a wavelength corresponding to a bandgap of the intrinsic semiconductor. When heat is externally supplied to the thermo-optical converter, light having a spectrum in a band of shorter wavelengths than a cutoff wavelength is produced by interband absorption in the intrinsic semiconductor, and light of a resonant wavelength ?r in the wavelength band, the light causing resonance in the optical structure, is selectively intensified and emitted as thermal radiation light.
    Type: Application
    Filed: August 20, 2020
    Publication date: December 3, 2020
    Applicant: JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventors: Susumu NODA, Tatsuya SHIBAHARA, Menaka DE ZOYSA, Takashi ASANO, Keisuke KITANO, Katsuyoshi SUZUKI, Takuya INOUE, Kenji ISHIZAKI
  • Patent number: 10748772
    Abstract: A device forming method including: forming a diffusion layer by ion-implanting a dopant into a silicon single crystal substrate; and activating the diffusion layer by laser annealing. When the silicon single crystal substrate to be used has an oxygen concentration of less than 5 ppma in a region for forming the diffusion layer, the device forming method includes a step of controlling the region for forming the diffusion layer to have an oxygen concentration of 5 ppma or more before the diffusion layer is activated by the laser annealing. A device forming method capable of easily enhancing dopant activation level by laser annealing even when a region for forming a diffusion layer has a low oxygen concentration.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: August 18, 2020
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Katsuyoshi Suzuki
  • Publication number: 20200194263
    Abstract: A device forming method including: forming a diffusion layer by ion-implanting a dopant into a silicon single crystal substrate; and activating the diffusion layer by laser annealing. When the silicon single crystal substrate to be used has an oxygen concentration of less than 5 ppma in a region for forming the diffusion layer, the device forming method includes a step of controlling the region for forming the diffusion layer to have an oxygen concentration of 5 ppma or more before the diffusion layer is activated by the laser annealing. A device forming method capable of easily enhancing dopant activation level by laser annealing even when a region for forming a diffusion layer has a low oxygen concentration.
    Type: Application
    Filed: September 15, 2017
    Publication date: June 18, 2020
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventor: Katsuyoshi SUZUKI
  • Patent number: 10620702
    Abstract: An internal device of a brain-machine interface system includes: an electrode group including N electrodes, N being 2 or more; an amplification element group including N amplification elements; a communicator communicating with an external device; and a controller selectively executing one of: a normal operation mode in which electroencephalogram signals acquired through the N electrodes are supplied to the amplification element group in a manner that each of the N electrodes corresponds to a respective one of the N amplification elements, and N amplified electroencephalogram signals are transmitted; and a noise-reduction operation mode in which an electroencephalogram signal acquired through an M electrode of the electrode group is supplied to the amplification element group in a manner that each M electrode corresponds to respective plural ones of the amplification elements, and an M amplified electroencephalogram signal is transmitted, M being smaller than N.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: April 14, 2020
    Assignees: NIHON KOHDEN CORPORATION, OSAKA UNIVERSITY, NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY
    Inventors: Kaoru Imajo, Katsuyoshi Suzuki, Masayuki Hirata, Seiji Kameda, Takafumi Suzuki, Hiroshi Ando
  • Publication number: 20200054284
    Abstract: An internal device (1) is implanted in a living body (300). A control section (6) causes a communication section (5) to wirelessly transmit data corresponding to electroencephalogram signals of the living body (300) which are detected through a group of N (N is 2 or more) electrodes, to an external device (200). When the communication section (5) receives a designation signal designating a group of M electrode(s) (2a), M being smaller than N, the communication section (5) is caused to transmit data corresponding to electroencephalogram signals of the living body (300) which are detected through the group of M electrode(s) (2a), to the external device (200) in real time.
    Type: Application
    Filed: February 9, 2018
    Publication date: February 20, 2020
    Applicants: NIHON KOHDEN CORPORATION, OSAKA UNIVERSITY, NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY, SPChange, LLC.
    Inventors: Kaoru IMAJO, Katsuyoshi SUZUKI, Masayuki HIRATA, Seiji KAMEDA, Takafumi SUZUKI, Hiroshi ANDO, Takatsugu KAMATA
  • Publication number: 20190267239
    Abstract: A method for manufacturing a semiconductor device, including forming a Fin structure on a semiconductor silicon substrate, performing ion implantation into the Fin structure, and subsequently performing recovery heat treatment on the semiconductor silicon substrate to recrystallize silicon of the Fin structure, wherein the Fin structure is processed so as not to have an end face of a {111} plane of the semiconductor silicon onto a sidewall of the Fin structure to be formed. It also includes a method for manufacturing a semiconductor device that is capable of preventing a defect from being introduced into a Fin structure when the Fin structure is subjected to ion implantation and recovery heat treatment.
    Type: Application
    Filed: July 3, 2017
    Publication date: August 29, 2019
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Tsuyoshi OHTSUKI, Tadashi NAKASUGI, Hiroshi TAKENO, Katsuyoshi SUZUKI
  • Patent number: 10352821
    Abstract: Provided is a railway vehicle bearing abnormality sensing system that can accurately perform abnormality determination for railway vehicle bearings. The system (100) senses an abnormality in a plurality of rolling bearings (17) housed in an axle box (3) provided to a bogie (2). The system (100) includes: vibration detection devices (15) each detecting vibration of a rolling bearing; an analysis device (6) determining an abnormality in the bearings (17) on the basis of detection data detected by the device (15); and reception response detection start module (13) receiving a detection start signal and cause the device (15) to detect vibration of the rolling bearing. The system (100) further includes a measurement start command transmitting device (4), installed apart from a railway vehicle, transmitting the detection start signal to the module (13).
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: July 16, 2019
    Assignee: NTN CORPORATION
    Inventors: Hiroyoshi Ito, Katsuyoshi Suzuki
  • Patent number: 10349842
    Abstract: A blood pressure measuring apparatus, which measures a blood pressure of a living body, includes: a cuff-pressure control unit which controls a cuff pressure of a cuff that presses a part of the living body; an oscillation signal detection unit which detects an oscillation signal from the cuff pressure; a blood pressure specification unit which specifies systolic and diastolic blood pressures as the blood pressure of the living body from the oscillation signal; and a blood pressure determination unit which determines whether systolic and diastolic blood pressures are appropriate or not.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: July 16, 2019
    Assignee: Nihon Kohden Corporation
    Inventors: Takashi Usuda, Yoshiharu Kikuchi, Hideaki Hirahara, Naoki Kobayashi, Katsuyoshi Suzuki
  • Patent number: 10297463
    Abstract: A method for manufacturing a silicon wafer having a denuded zone in a surface layer by performing a heat treatment to a silicon wafer, including: a step A, performing a first rapid heat treatment of 0.01 msec or more and 100 msec or less to an upper surface layer alone of the silicon wafer to be treated at 1300° C. or more and a silicon melting point or less by using a first heat source which heats the silicon wafer to be treated from above; and a step B, holding the silicon wafer to be treated at 1100° C. or more and less than 1300° C. for one second or more and 100 seconds or less by a second rapid heat treatment using a second heat source which heats the silicon wafer to be heated, and decreasing the temperature at a falling rate of 30° C./sec or more and 150° C./sec or less.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: May 21, 2019
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Katsuyoshi Suzuki, Hiroshi Takeno, Koji Ebara
  • Patent number: 10286512
    Abstract: A machining system capable of preventing mist from leaking out from an enclosure to the outside. The machining system includes a first enclosure including an opening and configured to define a first space in which a workpiece is processed, a second enclosure arranged adjacent to the first enclosure and configured to define a second space communicating with the first space through the opening, wherein a robot which can advance to and retreat from the first space through the opening is installed in the second space, and a pressure adjustment device configured to increase a pressure in the second space higher than a pressure in the first space.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: May 14, 2019
    Assignee: FANUC CORPORATION
    Inventor: Katsuyoshi Suzuki
  • Publication number: 20180247830
    Abstract: A method for manufacturing a silicon wafer having a denuded zone in a surface layer by performing a heat treatment to a silicon wafer, including: a step A, performing a first rapid heat treatment of 0.01 msec or more and 100 msec or less to an upper surface layer alone of the silicon wafer to be treated at 1300° C. or more and a silicon melting point or less by using a first heat source which heats the silicon wafer to be treated from above; and a step B, holding the silicon wafer to be treated at 1100° C. or more and less than 1300° C. for one second or more and 100 seconds or less by a second rapid heat treatment using a second heat source which heats the silicon wafer to be heated, and decreasing the temperature at a falling rate of 30° C./sec or more and 150° C./sec or less.
    Type: Application
    Filed: January 7, 2016
    Publication date: August 30, 2018
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Katsuyoshi SUZUKI, Hiroshi TAKENO, Koji EBARA
  • Publication number: 20180120937
    Abstract: An internal device of a brain-machine interface system includes: an electrode group including N electrodes, N being 2 or more; an amplification element group including N amplification elements; a communicator communicating with an external device; and a controller selectively executing one of: a normal operation mode in which electroencephalogram signals acquired through the N electrodes are supplied to the amplification element group in a manner that each of the N electrodes corresponds to a respective one of the N amplification elements, and N amplified electroencephalogram signals are transmitted; and a noise-reduction operation mode in which an electroencephalogram signal acquired through an M electrode of the electrode group is supplied to the amplification element group in a manner that each M electrode corresponds to respective plural ones of the amplification elements, and an M amplified electroencephalogram signal is transmitted, M being smaller than N.
    Type: Application
    Filed: November 1, 2017
    Publication date: May 3, 2018
    Applicants: NIHON KOHDEN CORPORATION, OSAKA UNIVERSITY, NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIO NS TECHNOLOGY
    Inventors: Kaoru IMAJO, Katsuyoshi SUZUKI, Masayuki HIRATA, Seiji KAMEDA, Takafumi SUZUKI, Hiroshi ANDO
  • Patent number: 9708578
    Abstract: A measuring unit which is to be attached to a cell culture container configured to accommodate cells to be cultured and a culture solution, includes: a measurer which is configured to measure information related to the cells and the culture solution, in a non-contact manner; and a sensor which is configured to detect at least one of a position, a posture, an impact, an orientation, and vibration.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 18, 2017
    Assignees: NIHON KOHDEN CORPORATION, TOKYO WOMEN'S MEDICAL UNIVERSITY
    Inventors: Mitsuhiro Oura, Hirotsugu Kubo, Katsuyoshi Suzuki, Katsuhide Tone, Teruo Okano, Tatsuya Shimizu
  • Publication number: 20170176287
    Abstract: Provided is a railway vehicle bearing abnormality sensing system that can accurately perform abnormality determination for railway vehicle bearings. The system (100) senses an abnormality in a plurality of rolling bearings (17) housed in an axle box (3) provided to a bogie (2). The system (100) includes: vibration detection devices (15) each detecting vibration of a rolling bearing; an analysis device (6) determining an abnormality in the bearings (17) on the basis of detection data detected by the device (15); and reception response detection start module (13) receiving a detection start signal and cause the device (15) to detect vibration of the rolling bearing. The system (100) further includes a measurement start command transmitting device (4), installed apart from a railway vehicle, transmitting the detection start signal to the module (13).
    Type: Application
    Filed: March 8, 2017
    Publication date: June 22, 2017
    Applicant: NTN CORPORATION
    Inventors: Hiroyoshi ITO, Katsuyoshi SUZUKI