Patents by Inventor Katunobu Awane
Katunobu Awane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 6327015Abstract: In forming four liquid crystal panels on a glass substrate, layout is so made that peripheral driving circuit areas of the respective panels are opposed to each other. With this layout, the peripheral driving circuit areas, which are prone to be affected by particles, are prevented from existing in regions close to the perimeter of the glass substrate. This allows liquid crystal panels to be produced at a high yield, as well as enables efficient use of the glass substrate.Type: GrantFiled: January 30, 2001Date of Patent: December 4, 2001Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Katunobu Awane, Shunpei Yamazaki
-
Publication number: 20010006411Abstract: In forming four liquid crystal panels on a glass substrate, layout is so made that peripheral driving circuit areas of the respective panels are opposed to each other. With this layout, the peripheral driving circuit areas, which are prone to be affected by particles, are prevented from existing in regions close to the perimeter of the glass substrate. This allows liquid crystal panels to be produced at a high yield, as well as enables efficient use of the glass substrate.Type: ApplicationFiled: January 30, 2001Publication date: July 5, 2001Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Katunobu Awane, Shunpei Yamazaki
-
Patent number: 6229531Abstract: An active matrix display device comprising an integrated peripheral driver circuit improved in image quality, provided in such a constitution that the feed through voltage &Dgr;Vs is set lower than the voltage Vgr necessary for realizing a single gradation. In this manner, a stable gradation display is obtained without being influenced by the feed through voltage &Dgr;Vs even when the fluctuation in the characteristics of the thin-film transistors provided in active matrix circuit may fluctuate the &Dgr;Vs.Type: GrantFiled: August 27, 1997Date of Patent: May 8, 2001Assignee: Semiconductor Energy Laboratory, Co., LTDInventors: Setsuo Nakajima, Katunobu Awane, Tatsuo Morita
-
Patent number: 6211535Abstract: Method of forming an active layer for TFTs without plasma-damaging the side surfaces of the active layer. The method is started with forming a crystalline silicon film on a glass substrate. A resist mask is placed on the silicon film. The silicon film is etched with an etchant gas consisting mainly of a halogen fluoride gas, thus forming the active layer. During this process, the etchant gas is not changed into a plasma to prevent the side surfaces of the active layer from being plasma-damaged. ClF3 can be used as the halogen fluoride gas.Type: GrantFiled: October 26, 1999Date of Patent: April 3, 2001Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Yoshitaka Yamamoto, Hideomi Suzawa, Katunobu Awane, Fumiaki Funada, Shunpei Yamazaki
-
Patent number: 6201591Abstract: In forming four liquid crystal panels on a glass substrate, layout is so made that peripheral driving circuit areas of the respective panels are opposed to each other. With this layout, the peripheral driving circuit areas, which are prone to be affected by particles, are prevented from existing in regions close to the perimeter of the glass substrate. This allows liquid crystal panels to be produced at a high yield, as well as enables efficient use of the glass substrate.Type: GrantFiled: October 20, 1999Date of Patent: March 13, 2001Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Katunobu Awane, Shunpei Yamazaki
-
Patent number: 6118506Abstract: An active matrix liquid crystal display having a high aperture ratio is provided. Retaining capacitors are created between a black matrix and pixel electrodes via a dielectric layer made from an organic resinous material or inorganic material. Those regions of the black matrix which cover TFTs are fully utilized. Therefore, wider area can be used to display an image than heretofore. In the present invention, the difference in relative dielectric constant between different dielectric layers is employed. Therefore, retaining capacitors can be created without the need to take account of parasitic capacitance.Type: GrantFiled: September 25, 1998Date of Patent: September 12, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Naoaki Yamaguchi, Katunobu Awane, Funiaki Funada, Yoshitaka Yamamoto
-
Patent number: 6108056Abstract: In an active matrix display device integrated with a peripheral drive circuit using thin film transistors, when Vgr is a voltage required for one gradation, Ct is capacitance of all pixels, Cgd is capacitance between a gate and a drain, .DELTA.Vg is a difference between ON/OFF gate voltages, and .DELTA.Vs is a feedthrough voltage, the respective parameters satisfy an expression: .vertline.Vgr.vertline.>.vertline.(1/Ct) [Cgd.multidot..DELTA.Vg-Ct.multidot..DELTA.Vs].vertline.. According to this, even if dispersion occurs in the characteristics of the thin film transistors arranged for a buffer circuit or an active matrix circuit, it is possible to prevent the dispersion from influencing the gradation display.Type: GrantFiled: November 2, 1999Date of Patent: August 22, 2000Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Setsuo Nakajima, Katunobu Awane, Tatsuo Morita
-
Patent number: 5982469Abstract: In forming four liquid crystal panels on a glass substrate, layout is so made that peripheral driving circuit areas of the respective panels are opposed to each other. With this layout, the peripheral driving circuit areas, which are prone to be affected by particles, are prevented from existing in regions close to the perimeter of the glass substrate. This allows liquid crystal panels to be produced at a high yield, as well as enables efficient use of the glass substrate.Type: GrantFiled: February 21, 1996Date of Patent: November 9, 1999Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Katunobu Awane, Shunpei Yamazaki
-
Patent number: 5982348Abstract: In an active matrix display device integrated with a peripheral drive circuit using thin film transistors, when Vgr is a voltage required for one gradation, Ct is capacitance of all pixels, Cgd is capacitance between a gate and a drain, .DELTA.Vg is a difference between ON/OFF gate voltages, and .DELTA.Vs is a feedthrough voltage, the respective parameters satisfy an expression: .vertline.vgr.vertline.>.vertline.(1/Ct)[Cgd.multidot..DELTA.Vg-Ct.multido t..DELTA.Vs].vertline.. According to this, even if dispersion occurs in the characteristics of the thin film transistors arranged for a buffer circuit or an active matrix circuit, it is possible to prevent the dispersion from influencing the gradation display.Type: GrantFiled: September 2, 1997Date of Patent: November 9, 1999Assignees: Semiconductor Energy Laboratory Co., Sharp Kabushiki KaishaInventors: Setsuo Nakajima, Katunobu Awane, Tatsuo Morita
-
Patent number: 5926735Abstract: There is disclosed a manufacturing method of highly integrated circuits with thin-film transistors (TFTs) for use as peripheral driver circuitry in active-matrix liquid crystal display (LCD) panel with a pixel array each having a charge transfer control TFT, capable of facilitating formation of contact holes otherwise being difficult in cases where an anode oxide film is formed on gate electrodes of TFTs and lead wires both of which are made of anodizable metal, such as aluminum. The method includes execution of anodization while causing a resist mask to be disposed on part of the lead wire and electrode made of aluminum, thereby partly eliminating formation of the anode oxide film on the lead wire and electrode. At a later step of fabrication, each contact is formed by use of such portion that has no anode oxide film formed thereon. This may allow aluminum to be employed as lead wires while enabling easy fabrication of contacts therefor.Type: GrantFiled: February 19, 1997Date of Patent: July 20, 1999Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Shunpei Yamazaki, Naoaki Yamaguchi, Yuugo Goto, Satoshi Teramoto, Katunobu Awane, Yoshitaka Yamamoto, Toshimasa Hamada
-
Patent number: 5815226Abstract: An active matrix liquid crystal display having a high aperture ratio is provided. Retaining capacitors are created between a black matrix and pixel electrodes via a dielectric layer made from an organic resinous material or inorganic material. Those regions of the black matrix which cover TFTs are fully utilized. Therefore, wider area can be used to display an image than heretofore. In the present invention, the difference in relative dielectric constant between different dielectric layers is employed. Therefore, retaining capacitors can be created without the need to take account of parasitic capacitance.Type: GrantFiled: February 28, 1997Date of Patent: September 29, 1998Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Shunpei Yamazaki, Jun Koyama, Naoaki Yamaguchi, Katunobu Awane, Fumiaki Funada, Yoshitaka Yamamoto
-
Patent number: 5473450Abstract: A liquid crystal display device of the present invention includes: two substrates facing each other, at least one of the substrates being transparent; electrodes disposed on inside surfaces of the respective substrates; a display medium which is provided between the two substrates and formed of polymer walls containing a polymer as their main component and liquid crystal regions containing liquid crystal as their main component; and a plurality of pixels, wherein the liquid crystal regions are partitioned by the polymer walls and are close to the substrates, portions of the liquid crystal regions close to the substrates being in parallel with the substrates, an interval a between the center of one liquid crystal region and the center of an adjacent liquid crystal region in a direction along the surface of the substrate is within a width of one pixel along the direction, and 80% or more of the intervals a satisfy the relationship: 3b/2>a>b/2, where b is an average of the intervals a.Type: GrantFiled: April 27, 1993Date of Patent: December 5, 1995Assignee: Sharp Kabushiki KaishaInventors: Nobuaki Yamada, Tomoaki Kuratate, Tokihiko Shinomiya, Toshiyuki Hirai, Kohichi Fujimori, Masahiko Kondo, Noriaki Onishi, Shuichi Kohzaki, Kenji Majima, Katunobu Awane
-
Patent number: 4801351Abstract: Improvements in a method for performing a monocrystallizing operation through the application of energy beams upon a non-monocrystalline thin-film of non-crystalline or polycrystalline material formed on a non-crystalline insulating film. The resulting superior monocrystalline thin-film has a crystal direction coinciding with that of the monocrystalline silicon base-plate and is formed on the insulating film even if the insulating film is as thick as 4 .mu.m. The thin-film is sufficiently covered between the active layers of a three-dimensional circuit element on the monocrystalline silicon base plate.Type: GrantFiled: December 19, 1986Date of Patent: January 31, 1989Assignee: Agency of Industrial Science and TechnologyInventors: Katunobu Awane, Masayoshi Koba, Toshiaki Miyajima, Masashi Maekawa
-
Patent number: 4764413Abstract: A substrate for wiring an electrical component with an external circuit, comprises a base plate for accommodating the electrical component therein, a first insulation layer made of an organic material formed on the base plate, a first wiring formed on the first insulating layer, a second insulation layer made of an organic material formed on the first wiring, a second wiring formed on the second insulation layer, the second wiring being coupled to the electrical component, the base plate, the first insulation layer, the first wiring, and the second insulation layer being bent at the marginal edges thereof, in which portions of the first wiring on the bent portions are made of a material having a low temperature of recrystallization.Type: GrantFiled: September 13, 1984Date of Patent: August 16, 1988Assignee: Sharp Kabushiki KaishaInventors: Takashi Nukii, Shigeo Nakabu, Masaru Iwasaki, Katunobu Awane
-
Patent number: 4544989Abstract: A substrate for wiring an electrical component in an electrical circuit comprises a base substrate, a first insulating layer of an organic material formed over the base substrate, a wiring member formed on the first insulating layer, coupled to the component, a second insulating layer of an organic material formed over the first insulating layer, and a terminal member on the first insulating layer and appearing from the second insulating layer, connected to the wiring member. A third insulating layer of an organic material may be interposed between the first and the second insulating layers, carrying a second wiring member connected to the first wiring member.Type: GrantFiled: June 26, 1981Date of Patent: October 1, 1985Assignee: Sharp Kabushiki KaishaInventors: Shigeo Nakabu, Yuji Matsuda, Hirokazu Yoshida, Masaru Iwasaki, Takashi Nukii, Katunobu Awane
-
Patent number: 4514042Abstract: A display module comprises a display device for displaying visual information, an electrode disposed on the display device, a circuit board for carrying wiring lines connected to circuit elements for driving the display deivce, and a conductive elastomer body for connecting the wiring lines and the electrode, the conductive elastomer body being placed between the electrode and a curled edge a flange of the circuit board. In a specific form, the display device is a liquid crystal display cell.Type: GrantFiled: September 23, 1982Date of Patent: April 30, 1985Assignee: Sharp Kabushiki KaishaInventors: Takashi Nukii, Shigeo Nakabu, Masaru Iwasaki, Katunobu Awane
-
Patent number: 4194214Abstract: High voltage diffusion-self-alignment metal oxide semiconductor devices and control logic circuitry therefor are integrated in a single semiconductor body. The integrated semiconductor device includes a considerably large number of output terminals compared to the number of input terminals. The output terminals develop signals of high voltages derived from the high voltage diffusion-self-alignment metal oxide semiconductor devices which are positioned at a peripheral zone of the semiconductor body.Type: GrantFiled: August 25, 1977Date of Patent: March 18, 1980Assignee: Sharp Kabushiki KaishaInventors: Katunobu Awane, Hironori Hattori, Tetuo Biwa, Hiroshi Tamaki
-
Patent number: 4058822Abstract: In a metal oxide semiconductor device of the diffusion-self-alignment type which comprises a semiconductor body having a conductivity of one type, a drain and a source regions having a conductivity opposite that of the semiconductor body, and a channel region of the same conductivity type as the semiconductor body and having a higher conductivity than that of the semiconductor body, said channel region being formed in such a manner to surround the source region through the use of double diffusion techniques. An active pinched resistor layer of the opposite conductivity type to that of the semiconductor body and having a lower conductivity than that of the drain and the source regions is formed on the surface of the semiconductor body to extend between the drain and the channel regions.Type: GrantFiled: June 1, 1976Date of Patent: November 15, 1977Assignee: Sharp Kabushiki KaishaInventors: Katunobu Awane, Hironori Hattori, Tetuo Biwa, Hiroshi Tamaki