Patents by Inventor Katuyuki Yasukouchi

Katuyuki Yasukouchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Level shift circuit and semiconductor device
    Patent number: 7368969
    Abstract: A level shift circuit including a capacitor, a charge control circuit, and a limiting circuit. The charge control circuit is connected to the capacitor to provide the voltage of a high potential power supply to the capacitor and to control the charging of the capacitor. The limiting circuit is connected to the high potential power supply and the charge control circuit to limit the voltage provided to the capacitor from the high potential power supply before the charge control circuit stops providing the voltage of the high potential power supply to the capacitor.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: May 6, 2008
    Assignee: Fujitsu Limited
    Inventors: Hisao Suzuki, Katuyuki Yasukouchi
  • Level shift circuit and semiconductor device
    Publication number: 20050195676
    Abstract: A level shift circuit including a capacitor, a charge control circuit, and a limiting circuit. The charge control circuit is connected to the capacitor to provide the voltage of a high potential power supply to the capacitor and to control the charging of the capacitor. The limiting circuit is connected to the high potential power supply and the charge control circuit to limit the voltage provided to the capacitor from the high potential power supply before the charge control circuit stops providing the voltage of the high potential power supply to the capacitor.
    Type: Application
    Filed: April 26, 2005
    Publication date: September 8, 2005
    Inventors: Hisao Suzuki, Katuyuki Yasukouchi
  • Level shift circuit and semiconductor device
    Patent number: 6917239
    Abstract: A level shift circuit including a capacitor, a charge control circuit, and a limiting circuit. The charge control circuit is connected to the capacitor to provide the voltage of a high potential power supply to the capacitor and to control the charging of the capacitor. The limiting circuit is connected to the high potential power supply and the charge control circuit to limit the voltage provided to the capacitor from the high potential power supply before the charge control circuit stops providing the voltage of the high potential power supply to the capacitor.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: July 12, 2005
    Assignee: Fujitsu Limited
    Inventors: Hisao Suzuki, Katuyuki Yasukouchi
  • Level shift circuit and semiconductor device
    Publication number: 20020047740
    Abstract: A level shift circuit including a capacitor, a charge control circuit, and a limiting circuit. The charge control circuit is connected to the capacitor to provide the voltage of a high potential power supply to the capacitor and to control the charging of the capacitor. The limiting circuit is connected to the high potential power supply and the charge control circuit to limit the voltage provided to the capacitor from the high potential power supply before the charge control circuit stops providing the voltage of the high potential power supply to the capacitor.
    Type: Application
    Filed: March 26, 2001
    Publication date: April 25, 2002
    Applicant: Fujitsu Limited
    Inventors: Hisao Suzuki, Katuyuki Yasukouchi
  • Semiconductor integrated circuit
    Patent number: 6323526
    Abstract: A semiconductor integrated circuit includes four electrodes arranged in a matrix and a wire connecting between two electrodes which are diagonally positioned to each other and selected from the four electrodes. The two remaining electrodes are diagonally positioned to each other across the wire, and have a side thereof facing the wire and extending in parallel to a longitudinal direction of the wire.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: November 27, 2001
    Assignee: Fujitsu Limited
    Inventors: Seiiti Saitou, Katuyuki Yasukouchi, Hiroko Kinoshita, Shinichi Nakagawa