Patents by Inventor Kaushal Kannan

Kaushal Kannan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10949005
    Abstract: The present disclosure relates to a testing device and techniques of testing semiconductor structures and, more particularly, to an absolute phase measurement testing device and technique of testing semiconductor structures. The structure includes: a first frequency input source which provides a first signal to an up-converter at an input side of a test fixture; a down-converter on an output side of the test fixture; a second frequency signal source which provides a second signal at a higher frequency than the first signal to the up-converter and the down-converter on the output side of the test fixture; a bypass path which bypasses the test fixture and provides connection between the up-converter and the down-converter; and a digitizer that is connected to an output side of the down-converter.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: March 16, 2021
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Mustapha Slamani, Kaushal Kannan, Ritin Nambiar, Timothy M. Platt
  • Publication number: 20200379585
    Abstract: The present disclosure relates to a testing device and techniques of testing semiconductor structures and, more particularly, to an absolute phase measurement testing device and technique of testing semiconductor structures. The structure includes: a first frequency input source which provides a first signal to an up-converter at an input side of a test fixture; a down-converter on an output side of the test fixture; a second frequency signal source which provides a second signal at a higher frequency than the first signal to the up-converter and the down-converter on the output side of the test fixture; a bypass path which bypasses the test fixture and provides connection between the up-converter and the down-converter; and a digitizer that is connected to an output side of the down-converter.
    Type: Application
    Filed: June 3, 2019
    Publication date: December 3, 2020
    Inventors: Mustapha SLAMANI, Kaushal KANNAN, Ritin NAMBIAR, Timothy M. PLATT
  • Patent number: 9401312
    Abstract: A method of redirecting signal bits associated with or corresponding to defective TSVs of a TSV array to a row or a column of redundant TSVs in the TSV array using a 2:4 Decoder and 4:2 Encoder and the resulting device are provided. Embodiments include forming a TSV array between a bottom die and a top die of a 3D IC stack, the TSV array having a row and a column of redundant TSVs; identifying a defective TSV of the TSV array; determining whether to shift a signal bit associated with or corresponding to the defective TSV in a first and/or a second direction towards the row or the column of redundant TSVs; and shifting the signal bit in the first and/or the second direction until the signal bit has been redirected to the row or the column of redundant TSVs.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: July 26, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Sukeshwar Kannan, Kaushal Kannan