Patents by Inventor Kaushik Roy

Kaushik Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11946988
    Abstract: A method of sensing a current in a conductor includes controlling a digital to analog converter output to cancel residual offset voltage in a magnetic tunnel junction device prior to sensing the current with the magnetic tunnel junction device. The method includes switching input to the magnetic tunnel junction device between a fixed voltage and an output of a digital to analog converter while switching input to a band pass filter between a lower and an upper voltage output of the magnetic tunnel junction device. The output of the digital to analog converter is modified to provide a low-amplitude unsaturated sine-wave at an output of the band pass filter, at which point changes in the output of the band pass filter are associated with the amount of current in a sensed conductor.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: April 2, 2024
    Assignee: Purdue Research Foundation
    Inventors: Kaushik Roy, Byunghoo Jung
  • Publication number: 20240098187
    Abstract: This disclosure describes an electronic device that can be installed within an access control system in parallel with a legacy interface device. The electronic device may perform steps of determining a set of configuration settings associated with an access control system to which the electronic device is electrically connected, receiving, by the electronic device, a first signal in a format associated with the access control system, configuring, based on the set of configuration settings, one or more signal pathways within the electronic device, generating, by routing the first signal through the one or more signal pathways, a second signal in a second format, and providing the second signal to at least one second electronic device.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Inventors: Aaron Lung, Kaushik Mani, Guiqing He, Anubhav Khanna, Ram Nikhil Dodda, Taru Roy, Ruslan Khanbikov, Jin Li, Martino Fossarello
  • Patent number: 11929141
    Abstract: Sparsity-aware reconfiguration compute-in-memory (CIM) static random access memory (SRAM) systems are disclosed. In one aspect, a reconfigurable precision succession approximation register (SAR) analog-to-digital converter (ADC) that has the ability to form (n+m) bit precision using n-bit and m-bit sub-ADCs is provided. By controlling which sub-ADCs are used based on data sparsity, precision may be maintained as needed while providing a more energy efficient design.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: March 12, 2024
    Assignee: Purdue Research Foundation
    Inventors: Kaushik Roy, Amogh Agrawal, Mustafa Fayez Ahmed Ali, Indranil Chakraborty, Aayush Ankit, Utkarsh Saxena
  • Publication number: 20230385543
    Abstract: A computing system is described that includes user interface components configured to receive typed user input; and one or more processors. The one or more processors are configured to: receive, by a computing system and at a first time, a first portion of text typed by a user in an electronic message being edited; predict, based on the first portion of text, a first candidate portion of text to follow the first portion of text; output, for display, the predicted first candidate portion of text for optional selection to append to the first portion of text; determine, at a second time that is after the first time, that the electronic message is directed to a sensitive topic; and responsive to determining that the electronic message is directed to a sensitive topic, refrain from outputting subsequent candidate portions of text for optional selection to append to text in the electronic message.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventors: Paul Roland Lambert, Timothy Youngjin Sohn, Jacqueline Amy Tsay, Gagan Bansal, Cole Austin Bevis, Kaushik Roy, Justin Tzi-jay LU, Katherine Anna Evans, Tobias Bosch, Yinan Wang, Matthew Vincent Dierker, Greg Russell Bullock, Ettore Randazzo, Tobias Kaufmann, Yonghui Wu, Benjamin N. Lee, Xu Chen, Brian Strope, Yun-hsuan Sung, Do Kook Choe, Rami Eid Sammour Al-Rfou'
  • Publication number: 20230341446
    Abstract: A system may include a non-intrusive sensor circuitry configured to provide electrical measurement data, including, for example, current data, voltage data, power factor data, active power consumption data, reactive power consumption data, or a combination thereof. A transient event detector may sweep the electrical measurement data with a first window and a second window, the first window adjacent to the second window. The transient event detector may identify a start and end of transient activity based on electrical measurement data referenced by separate adjacent windows. The transient event detector may capture a transient activity data segment comprising a portion of the electrical measurement data between first index and the second index.
    Type: Application
    Filed: September 30, 2020
    Publication date: October 26, 2023
    Applicant: Purdue Research Foundation
    Inventors: Kaushik Roy, Byunghoo Jung, Chamika Mihiranga Liyanagedera
  • Publication number: 20230305804
    Abstract: An in-memory vector addition method for a dynamic random access memory (DRAM) is disclosed which includes consecutively transposing two numbers across a plurality of rows of the DRAM, each number transposed across a fixed number of rows associated with a corresponding number of bits, assigning a scratch-pad including two consecutive bits for each bit of each number being added, two consecutive bits for carry-in (Cin), and two consecutive bits for carry-out-bar (Cout), assigning a plurality of bits in a transposed orientation to hold results as a sum of the two numbers, for each bit position of the two numbers: computing the associated sum of the bit position; and placing the computed sum in the associated bit of the sum.
    Type: Application
    Filed: June 3, 2023
    Publication date: September 28, 2023
    Applicant: Purdue Research Foundation
    Inventors: Mustafa Ali, Akhilesh Jaiswal, Kaushik Roy
  • Patent number: 11755834
    Abstract: A computing system is described that includes user interface components configured to receive typed user input; and one or more processors. The one or more processors are configured to: receive, by a computing system and at a first time, a first portion of text typed by a user in an electronic message being edited; predict, based on the first portion of text, a first candidate portion of text to follow the first portion of text; output, for display, the predicted first candidate portion of text for optional selection to append to the first portion of text; determine, at a second time that is after the first time, that the electronic message is directed to a sensitive topic; and responsive to determining that the electronic message is directed to a sensitive topic, refrain from outputting subsequent candidate portions of text for optional selection to append to text in the electronic message.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: September 12, 2023
    Assignee: Google LLC
    Inventors: Paul Roland Lambert, Timothy Youngjin Sohn, Jacqueline Amy Tsay, Gagan Bansal, Cole Austin Bevis, Kaushik Roy, Justin Tzi-jay Lu, Katherine Anna Evans, Tobias Bosch, Yinan Wang, Matthew Vincent Dierker, Gregory Russell Bullock, Ettore Randazzo, Tobias Kaufmann, Yonghui Wu, Benjamin N. Lee, Xu Chen, Brian Strope, Yun-hsuan Sung, Do Kook Choe, Rami Eid Sammouf Al-Rfou'
  • Patent number: 11704719
    Abstract: Methods, systems, and computer readable media for detecting customer presence to initiate the ordering and purchase of goods and services are disclosed. In one example, a system includes a detection server configured to detect the presence of a mobile device in a designated area associated with a merchant location and for initiating a menu selection application in the mobile device for placing an order for at least one product. The system further includes a merchant server configured to receive, from the mobile device, purchase order data associated with the order for the at least one product, a customer identifier associated with the mobile device, and a location identifier associated with the designated area, and for utilizing the customer identifier to send a notification message that indicates that the at least one product is available to the mobile device.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: July 18, 2023
    Assignee: MASTERCARD INTERNATIONAL INCORPORATED
    Inventors: Mohammad Khan, Kaushik Roy
  • Publication number: 20230178125
    Abstract: Sparsity-aware reconfiguration compute-in-memory (CIM) static random access memory (SRAM) systems are disclosed. In one aspect, a reconfigurable precision succession approximation register (SAR) analog-to-digital converter (ADC) that has the ability to form (n+m) bit precision using n-bit and m-bit sub-ADCs is provided. By controlling which sub-ADCs are used based on data sparsity, precision may be maintained as needed while providing a more energy efficient design.
    Type: Application
    Filed: December 8, 2021
    Publication date: June 8, 2023
    Inventors: Kaushik Roy, Amogh Agrawal, Mustafa Fayez Ahmed Ali, Indranil Chakraborty, Aayush Ankit, Utkarsh Saxena
  • Patent number: 11669302
    Abstract: An in-memory vector addition method for a dynamic random access memory (DRAM) is disclosed which includes consecutively transposing two numbers across a plurality of rows of the DRAM, each number transposed across a fixed number of rows associated with a corresponding number of bits, assigning a scratch-pad including two consecutive bits for each bit of each number being added, two consecutive bits for carry-in (Cin), and two consecutive bits for carry-out-bar (Cout), assigning a plurality of bits in a transposed orientation to hold results as a sum of the two numbers, for each bit position of the two numbers: computing the associated sum of the bit position; and placing the computed sum in the associated bit of the sum.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: June 6, 2023
    Assignee: Purdue Research Foundation
    Inventors: Mustafa Ali, Akhilesh Jaiswal, Kaushik Roy
  • Publication number: 20230152397
    Abstract: A method of sensing a current in a conductor includes controlling a digital to analog converter output to cancel residual offset voltage in a magnetic tunnel junction device prior to sensing the current with the magnetic tunnel junction device. The method includes switching input to the magnetic tunnel junction device between a fixed voltage and an output of a digital to analog converter while switching input to a band pass filter between a lower and an upper voltage output of the magnetic tunnel junction device. The output of the digital to analog converter is modified to provide a low-amplitude unsaturated sine-wave at an output of the band pass filter, at which point changes in the output of the band pass filter are associated with the amount of current in a sensed conductor.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 18, 2023
    Inventors: Kaushik Roy, Byunghoo Jung
  • Publication number: 20230030682
    Abstract: System and methods for high accuracy, non-intrusive current sensing are provided. A system may include two magnetic field sensors configured for differential sensing. The system may further include frontend circuitry configured to remove direct current (DC) offset of the magnetic field sensors, upconvert the outputs of the magnetic field sensors, and filter out at least one frequency component from the up-converted signals. The system may receive output signals from the front-end circuitry corresponding to each sensor. The system may further calculate a differential signal based on the output signals. The system may apply optimal detection based on the differential signal and a reference signal to calculate a measurement of current flow. The system may determine a phase angle measurement between the differential signal and the reference signal to calculate a direction of the current flow in the conductor and output various measurement information related to the detected current.
    Type: Application
    Filed: November 24, 2020
    Publication date: February 2, 2023
    Applicant: Purdue Research Foundation
    Inventors: Kaushik Roy, Byunghoo Jung, Chamika Mihiranga Liyanagedera
  • Publication number: 20230005616
    Abstract: A method includes receiving a current claim associated with care provided to a patient by a provider, the claim including a current diagnosis code and a first current procedural terminology (CPT) code that are based on the care that was provided; identifying, using an artificial intelligence (AI) engine, a second current CPT code based on the current diagnosis code and the first current CPT code; and generating a current confidence level value that the second current CPT code is missing from the current claim.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Inventors: Wenji Zhang, Feili Yu, Kaushik Roy
  • Patent number: 11543471
    Abstract: A current sensing system, comprising at least one magnetic tunnel junction device placed adjacent to a current carrying conductor electrically connected to a battery of a vehicle. The magnetic tunnel junction device is configured to measure a magnetic field around the conductor. A monitoring device is operatively connected to the magnetic tunnel junction device, wherein the monitoring device is configured to receive the magnetic field measurement and determine an estimate of the current flowing through the conductor.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: January 3, 2023
    Assignee: Purdue Research Foundation
    Inventors: Kaushik Roy, Byunghoo Jung
  • Publication number: 20220358484
    Abstract: A system for issuing a dynamic temporary credential to a portable communication device for use in a transaction with an electronic control point. The system receives the current geo-location of the portable communication device and transmits a dynamic temporary credential to the portable communication device from the centralized computer. The system further scores the risk in authorizing a transaction associated with an electronic control point using the dynamic temporary credential it issued. The system may prevent the transmission of the dynamic temporary credential until the end user has been authenticated, which may include verifying one or more of a manually input passcode, the unique digital signature of the portable communication device, and know your customer queries.
    Type: Application
    Filed: March 4, 2022
    Publication date: November 10, 2022
    Applicant: Sequent Software, Inc.
    Inventors: David Brudnicki, Michael Craft, Hans Reisgies, Andrew Weinstein, Miller Abel, Kaushik Roy
  • Patent number: 11210657
    Abstract: A method, electronic device, and non-transitory computer readable medium for a mobile wallet remittance are provided. The method includes receiving a request to remit money from a sender to a receiver, wherein the request includes transaction information. The method also includes generating a list of eligible providers from a plurality of providers based on the transaction information. Additionally, the method includes notifying a provider to transfer the money when an indication is received that a provider is selected from the list of eligible providers.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: December 28, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Vinod Cherian Joseph, Tuomo Sipila, Homayoon Shahinfar, Kaushik Roy
  • Patent number: 11151040
    Abstract: An approximate cache system is disclosed. The system includes a quality aware cache controller (QACC), a cache, a quality table configured to receive addresses and a quality specification from the processor associated with each address and further configured to provide the quality specification for each address to the QACC, wherein the QACC controls approximation is based on one or more of i) approximation through partial read operations; ii) approximation through lower read currents; iii) approximation through skipped write operations; iv) approximation through partial write operations; v) approximations through lower write duration; vi) approximation through lower write currents; and vii) approximations through skipped refreshes.
    Type: Grant
    Filed: March 24, 2019
    Date of Patent: October 19, 2021
    Assignee: Purdue Research Foundation
    Inventors: Ashish Ranjan, Swagath Venkataramani, Zoha Pajouhi, Rangharajan Venkatesan, Kaushik Roy, Anand Raghunathan
  • Publication number: 20210142157
    Abstract: An electronic neuron device that includes a thresholding unit which utilizes current-induced spin-orbit torque (SOT). A two-step switching scheme is implemented with the device. In the first step, a charge current through heavy metal (HM) places the magnetization of a nano-magnet along the hard-axis (i.e. an unstable point for the magnet). In the second step, the device receives a current (from an electronic synapse) which moves the magnetization from the unstable point to one of the two stable states. The polarity of the net synaptic current determines the final orientation of the magnetization. A resistive crossbar array may also be provided which functions as the synapse generating a bipolar current that is a weighted sum of the inputs of the device.
    Type: Application
    Filed: August 20, 2020
    Publication date: May 13, 2021
    Applicant: Purdue Research Foundation
    Inventors: Abhronil Sengupta, Sri Harsha Choday, Yusung Kim, Kaushik Roy
  • Publication number: 20210117156
    Abstract: An in-memory vector addition method for a dynamic random access memory (DRAM) is disclosed which includes consecutively transposing two numbers across a plurality of rows of the DRAM, each number transposed across a fixed number of rows associated with a corresponding number of bits, assigning a scratch-pad including two consecutive bits for each bit of each number being added, two consecutive bits for carry-in (Cin), and two consecutive bits for carry-out-bar (Cout), assigning a plurality of bits in a transposed orientation to hold results as a sum of the two numbers, for each bit position of the two numbers: computing the associated sum of the bit position; and placing the computed sum in the associated bit of the sum.
    Type: Application
    Filed: October 15, 2020
    Publication date: April 22, 2021
    Applicant: Purdue Research Foundation
    Inventors: Mustafa Ali, Akhilesh Jaiswal, Kaushik Roy
  • Patent number: 10825510
    Abstract: A method of obtaining an in-memory vector-based dot product is disclosed, which includes providing a matrix of memory cells having M rows, each memory cell in each row holding a value and having dedicated read transistors T1 and T2, where T1 is controlled by the value held in the associated memory cell and T2 is controlled by a row-dedicated source (vin) for each row, the combination of the T1 and T2 transistors for each cell selectively (i) couple a reference voltage with a column-dedicated read bit line (RBL) for each column for an in-memory vector-based dot product operation or (ii) couple ground with the column-dedicated read bit line (RBL) for each column for a memory read operation, where total resistance of the read transistors (R) for each cell in each row is based on Rmax/2(M-1), . . . Rmax, where Rmax is the resistance of the least significant cell in each row.
    Type: Grant
    Filed: February 9, 2019
    Date of Patent: November 3, 2020
    Assignee: Purdue Research Foundation
    Inventors: Akhilesh Ramlaut Jaiswal, Amogh Agrawal, Kaushik Roy, Indranil Chakraborty