Patents by Inventor Kazuaki Hiyama

Kazuaki Hiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020191426
    Abstract: The present invention relates to an inrush current limiting circuit, a power source device and a power conversion device. It is an object of the present invention to limit an inrush current with high reliability and durability while reducing overall weight and volume of the device even under a high rated power. In order to achieve the object, a switch (11) a capacitor (12) and a switching element (30) are connected in series to one another, and the serial circuit formed thereof is connected to the main power source (10). An invester 13 is connected to the capacitor (12). A serial circuit formed of a capacitor (32) and a resistor (33) is connected between a collector and a gate of the switching clement (30). A drive circuit (20) drives the switching clement (30) to turn ON when the switch (11) turns ON.
    Type: Application
    Filed: July 15, 2002
    Publication date: December 19, 2002
    Inventors: Khalid Hassan Hussein, Kazuaki Hiyama
  • Publication number: 20020176215
    Abstract: In a semiconductor protection circuit comprising a low speed protection circuit having an overcurrent detector for detecting an overcurrent of a predetermined switching element and turning off the semiconductor switching element following detection of the overcurrent, and a high speed protection circuit turning off the semiconductor switching element based on a voltage signal proportional to an output voltage of the semiconductor switching element, the high speed protection circuit includes a MOSFET having a drain connected to a gate of the semiconductor switching element, a diode having a cathode which is connected to a gate of the MOSFET, and a anode through which the voltage signal proportional to the output current from the semiconductor switching element is inputted to the diode, and a capacitor having one end connected to a cathode of the diode and a gate of the MOSFET.
    Type: Application
    Filed: October 30, 2001
    Publication date: November 28, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuaki Hiyama, Akihisa Yamamoto
  • Patent number: 6459598
    Abstract: An inverter apparatus includes an inverter circuit for driving a load. This inverter circuit has at least a pair of switching elements connected in series in a forward direction between both polarity terminals of a dc supply for supplying power to a load. An inverter drive circuit is employed for driving each switching element of the inverter circuit and has at least one high withstand voltage IC wherein the signal level reference potential is different in the input signal and the output signal. A clamping circuit clamps the potential of the low voltage side reference terminal, to which a potential, that is a reference for operation of the high withstand voltage IC in the inverter drive circuit and is a reference for a signal on the low potential side of the high withstand voltage IC, is applied. The voltage is clamped to the high voltage reference terminal to which is applied a reference potential for the high potential-side signal in the high withstand voltage IC.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: October 1, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akihisa Yamamoto, Kazuaki Hiyama, Shinji Hatae
  • Patent number: 6351399
    Abstract: To prevent malfunction or breakdown due to a surge voltage in a power converter for converting DC into AC or the like so as to supply electric power to a load, not only a control signal is transmitted via a level shift circuit which is provided correspondingly to each of switching semiconductor elements forming a main circuit and shifts a level of a reference potential at its output side so as to follow variations of a reference potential of the switching semiconductor element to the switching semiconductor element, but a DC control power source for supplying electric power to the level shift circuit and a negative pole of the switching semiconductor element are connected to each other through at least one of an inductor and a resistance.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: February 26, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ken Takanashi, Shinji Hatae, Kazuaki Hiyama, Khalid Hassan Hussein, Fumitaka Tametani
  • Publication number: 20010028572
    Abstract: To prevent malfunction or breakdown due to a surge voltage in a power converter for converting DC into AC or the like so as to supply electric power to a load, not only a control signal is transmitted via a level shift circuit which is provided correspondingly to each of switching semiconductor elements forming a main circuit and shifts a level of a reference potential at its output side so as to follow variations of a reference potential of the switching semiconductor element to the switching semiconductor element, but a DC control power source for supplying electric power to the level shift circuit and a negative pole of the switching semiconductor element are connected to each other through at least one of an inductor and a resistance.
    Type: Application
    Filed: February 28, 2001
    Publication date: October 11, 2001
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Ken Takanashi, Shinji Hatae, Kazuaki Hiyama, Khalid Hassan Hussein, Fumitaka Tametani
  • Patent number: 6018474
    Abstract: A capacitive element is charged with no excessive flow of current so that a potential to effect the operation of a switching element can be obtained with stability. A capacitor (30) is charged with a circulating current from a load (40). On the charging path, a resistor (21) is provided in series to prevent an excessive flow of the charging current. Between terminals (V.sub.B, V.sub.S) of an upper-arm driving circuit (25) which receive a voltage to effect the operation of an IGBT (34) of an upper arm, the capacitor (30) and the resistor (21) are provided to suppress a decrease in potential (V.sub.B) at the terminal (V.sub.B).
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: January 25, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Khalid Hassan Hussein, Tooru Iwagami, Mitsutaka Iwasaki, Kazuaki Hiyama