Patents by Inventor Kazuaki Kubo

Kazuaki Kubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10910136
    Abstract: A semiconductor device includes an output driving circuit configured to output an output current to an output terminal; a detection resistor connected between the output terminal and the output driving circuit; an amplification unit configured to output an analog detection signal generated by amplifying a voltage between both ends of the detection resistor; a current generation circuit configured to output a reference current; a reference resistor connected between the current generation circuit and a ground and configured to output a reference voltage according to the reference current; an A/D converter configured to convert the analog detection signal into a digital detection signal using the reference voltage as a reference; and a control circuit configured to control the output current output from the output driving circuit according to the digital detection signal. The detection resistor has a same temperature characteristics as the reference resistor.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: February 2, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Satoshi Kondo, Kazuaki Kubo, Noriyuki Itano
  • Patent number: 10879692
    Abstract: There is a need to provide a semiconductor device and an electronic control system including the same while the semiconductor device is capable of continuing normal operation even when a negative surge voltage is applied. According to an embodiment, a driver IC includes an output transistor, a driver control circuit, a negative potential clamp circuit, and an ESD protection circuit. The output transistor is provided between a battery voltage terminal and an output terminal coupled to a load. The driver control circuit switches on-off state of the output transistor by controlling a gate voltage of the output transistor with reference to a voltage of the output terminal. The negative potential clamp circuit turns on the output transistor regardless of control from the control circuit when a negative voltage lower than a predetermined voltage is applied to the output terminal.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: December 29, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kazuaki Kubo, Koichiro Hashimoto
  • Publication number: 20190080830
    Abstract: A semiconductor device includes an output driving circuit configured to output an output current to an output terminal; a detection resistor connected between the output terminal and the output driving circuit; an amplification unit configured to output an analog detection signal generated by amplifying a voltage between both ends of the detection resistor; a current generation circuit configured to output a reference current; a reference resistor connected between the current generation circuit and a ground and configured to output a reference voltage according to the reference current; an A/D converter configured to convert the analog detection signal into a digital detection signal using the reference voltage as a reference; and a control circuit configured to control the output current output from the output driving circuit according to the digital detection signal. The detection resistor has a same temperature characteristics as the reference resistor.
    Type: Application
    Filed: November 9, 2018
    Publication date: March 14, 2019
    Inventors: Satoshi Kondo, Kazuaki Kubo, Noriyuki Itano
  • Patent number: 10176913
    Abstract: An output driving circuit outputs an output current to a solenoid incorporated in a vehicle through an output terminal. A detection resistor connected between the output terminal and the output driving circuit. An amplification unit configured to output an analog detection signal generated by amplifying a voltage between both ends of the detection resistor. A current generation circuit configured to output a reference current. A reference resistor connected between the current generation circuit and a ground and configured to output a reference voltage according to the reference current. An A/D converter configured to convert the analog detection signal into a digital detection signal using the reference voltage as a reference. A control circuit configured to control the output current output from the output driving circuit according to the digital detection signal.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: January 8, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Satoshi Kondo, Kazuaki Kubo, Noriyuki Itano
  • Publication number: 20180248365
    Abstract: There is a need to provide a semiconductor device and an electronic control system including the same while the semiconductor device is capable of continuing normal operation even when a negative surge voltage is applied. According to an embodiment, a driver IC includes an output transistor, a driver control circuit, a negative potential clamp circuit, and an ESD protection circuit. The output transistor is provided between a battery voltage terminal and an output terminal coupled to a load. The driver control circuit switches on-off state of the output transistor by controlling a gate voltage of the output transistor with reference to a voltage of the output terminal. The negative potential clamp circuit turns on the output transistor regardless of control from the control circuit when a negative voltage lower than a predetermined voltage is applied to the output terminal.
    Type: Application
    Filed: December 29, 2017
    Publication date: August 30, 2018
    Inventors: Kazuaki KUBO, Koichiro HASHIMOTO
  • Publication number: 20160300653
    Abstract: An output driving circuit outputs an output current to a solenoid incorporated in a vehicle through an output terminal. A detection resistor connected between the output terminal and the output driving circuit. An amplification unit configured to output an analog detection signal generated by amplifying a voltage between both ends of the detection resistor. A current generation circuit configured to output a reference current. A reference resistor connected between the current generation circuit and a ground and configured to output a reference voltage according to the reference current. An A/D converter configured to convert the analog detection signal into a digital detection signal using the reference voltage as a reference. A control circuit configured to control the output current output from the output driving circuit according to the digital detection signal.
    Type: Application
    Filed: March 15, 2016
    Publication date: October 13, 2016
    Inventors: Satoshi KONDO, Kazuaki KUBO, Noriyuki ITANO
  • Patent number: 8164909
    Abstract: A base plate for a power module includes: a metal plate, a ceramic base plate joined to the metal plate, and a release agent provided in a joint surface between the metal plate and the ceramic base plate. A remaining amount of the release agent is less than 5 as an amount of boron measured by fluorescence X-ray analysis, and a crystal grain straining region in the joint surface is equal to or less than 40%, or an amount of crystal grain straining in the joint surface is equal to or less than 0.03%.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: April 24, 2012
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshiyuki Nagase, Yoshiyuki Nagatomo, Kazuaki Kubo, Takeshi Negishi
  • Patent number: 8093762
    Abstract: In a power phase period when in normal operation, switch portions SW2H and SW2L and switch portions SW3H and SW3L are turned ON, respectively, and switch portions SW1H and SW1L are turned OFF. And floating power supply is provided from an electrostatic capacitance element CS to buses A and B, a floating control circuit 4, a transmitter circuit 5, and a receiver circuit 6, respectively. In a data phase period, the switch portions SW1H and SW1L are turned ON, and the switch portions SW2H, SW2L, SW3H, and SW3L are turned OFF. By that manner, the electrostatic capacitance element CS is charged by the power supply of a battery B, and an electrostatic capacitance element CH provides the floating power supply to the floating control circuit 4, the transmitter circuit 5, and the receiver circuit 6, respectively. By this manner, a floating switch unit 7 in which the number of the switch portions is considerably reduced can be configured.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: January 10, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyoshi Takai, Takahiro Yashita, Kikuo Kato, Kazuaki Kubo
  • Publication number: 20110260776
    Abstract: In a power phase period when in normal operation, switch portions SW2H and SW2L and switch portions SW3H and SW3L are turned ON, respectively, and switch portions SW1H and SW1L are turned OFF. And floating power supply is provided from an electrostatic capacitance element CS to buses A and B, a floating control circuit 4, a transmitter circuit 5, and a receiver circuit 6, respectively. In a data phase period, the switch portions SW1H and SW1L are turned ON, and the switch portions SW2H, SW2L, SW3H, and SW3L are turned OFF. By that manner, the electrostatic capacitance element CS is charged by the power supply of a battery B, and an electrostatic capacitance element CH provides the floating power supply to the floating control circuit 4, the transmitter circuit 5, and the receiver circuit 6, respectively. By this manner, a floating switch unit 7 in which the number of the switch portions is considerably reduced can be configured.
    Type: Application
    Filed: July 8, 2011
    Publication date: October 27, 2011
    Inventors: KAZUYOSHI TAKAI, Takahiro Yashita, Kikuo Kato, Kazuaki Kubo
  • Patent number: 7989988
    Abstract: In a power phase period when in normal operation, switch portions SW2H and SW2L and switch portions SW3H and SW3L are turned ON, respectively, and switch portions SW1H and SW1L are turned OFF. And floating power supply is provided from an electrostatic capacitance element CS to buses A and B, a floating control circuit 4, a transmitter circuit 5, and a receiver circuit 6, respectively. In a data phase period, the switch portions SW1H and SW1L are turned ON, and the switch portions SW2H, SW2L, SW3H, and SW3L are turned OFF. By that manner, the electrostatic capacitance element CS is charged by the power supply of a battery B, and an electrostatic capacitance element CH provides the floating power supply to the floating control circuit 4, the transmitter circuit 5, and the receiver circuit 6, respectively. By this manner, a floating switch unit 7 in which the number of the switch portions is considerably reduced can be configured.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: August 2, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyoshi Takai, Takahiro Yashita, Kikuo Kato, Kazuaki Kubo
  • Publication number: 20100230473
    Abstract: A base plate for a power module includes: a metal plate, a ceramic base plate joined to the metal plate, and a release agent provided in a joint surface between the metal plate and the ceramic base plate. A remaining amount of the release agent is less than 5 as an amount of boron measured by fluorescence X-ray analysis, and a crystal grain straining region in the joint surface is equal to or less than 40%, or an amount of crystal grain straining in the joint surface is equal to or less than 0.03%.
    Type: Application
    Filed: May 20, 2010
    Publication date: September 16, 2010
    Applicant: Mitsubishi Materials Corporation
    Inventors: Toshiyuki Nagase, Yoshiyuki Nagatomo, Kazuaki Kubo, Takeshi Negishi
  • Publication number: 20090200874
    Abstract: In a power phase period when in normal operation, switch portions SW2H and SW2L and switch portions SW3H and SW3L are turned ON, respectively, and switch portions SW1H and SW1L are turned OFF. And floating power supply is provided from an electrostatic capacitance element CS to buses A and B, a floating control circuit 4, a transmitter circuit 5, and a receiver circuit 6, respectively. In a data phase period, the switch portions SW1H and SW1L are turned ON, and the switch portions SW2H, SW2L, SW3H, and SW3L are turned OFF. By that manner, the electrostatic capacitance element CS is charged by the power supply of a battery B, and an electrostatic capacitance element CH provides the floating power supply to the floating control circuit 4, the transmitter circuit 5, and the receiver circuit 6, respectively. By this manner, a floating switch unit 7 in which the number of the switch portions is considerably reduced can be configured.
    Type: Application
    Filed: June 30, 2006
    Publication date: August 13, 2009
    Inventors: Kazuyoshi Takai, Takahiro Yashita, Kikuo Kato, Kazuaki Kubo
  • Patent number: 7532481
    Abstract: A base plate for a power module includes: a metal plate, a ceramic base plate joined to the metal plate, and a release agent which includes boron provided in a joint surface between the metal plate and the ceramic base plate. A remaining amount of the release agent is less than 5, as an amount of boron measured by fluorescence X-ray analysis, where the amount of boron is defined as a value obtained by an expression: (a peak height of B-K?/a peak height of X-K?) x 100000 and a crystal grain straining region in the joint surface is equal to or less than 40%, or an amount of crystal grain straining in the joint surface is equal to or less than 0.03%.
    Type: Grant
    Filed: April 4, 2005
    Date of Patent: May 12, 2009
    Assignee: Mitsubishi Materials Corporation
    Inventors: Toshiyuki Nagase, Yoshiyuki Nagatomo, Kazuaki Kubo, Takeshi Negishi
  • Publication number: 20080248326
    Abstract: A base plate for a power module includes: a metal plate, a ceramic base plate joined to the metal plate, and a release agent provided in a joint surface between the metal plate and the ceramic base plate. A remaining amount of the release agent is less than 5 as an amount of boron measured by fluorescence X-ray analysis, and a crystal grain straining region in the joint surface is equal to or less than 40%, or an amount of crystal grain straining in the joint surface is equal to or less than 0.03%.
    Type: Application
    Filed: June 12, 2008
    Publication date: October 9, 2008
    Applicant: Mitsubishi Materials Corporation
    Inventors: Toshiyuki Nagase, Yoshiyuki Nagatomo, Kazuaki Kubo, Takeshi Negishi
  • Patent number: 7366019
    Abstract: There is provided a non-volatile memory capable of being supplied with two varieties of externally supplied voltages, stabilizing the operation thereof, at a voltage in the vicinity of a threshold voltage for switching over between the externally supplied voltages, and stabilizing the operation thereof, at the times of writing and erasing, respectively. The non-volatile memory comprises a power supply circuit incorporating a hysteresis comparator having two voltage levels for the threshold voltage, wherein by detection of 2.3V at a time when an externally supplied voltage rises, a detection signal goes to an “H” level, whereupon an internal step-down circuit, made up of a constant voltage circuit, and so forth, comes into action, generating an internal operation voltage at 2.2V to be subsequently supplied, and thereafter, by detection of 2.1V, the detection signal goes to an “L” level, whereupon the externally supplied voltage, as it is, is supplied as the internal operation voltage.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: April 29, 2008
    Assignee: Renesas Technology Corp.
    Inventor: Kazuaki Kubo
  • Publication number: 20070274047
    Abstract: A base plate for a power module includes: a metal plate, a ceramic base plate joined to the metal plate, and a release agent provided in a joint surface between the metal plate and the ceramic base plate. A remaining amount of the release agent is less than 5 as an amount of boron measured by fluorescence X-ray analysis, and a crystal grain straining region in the joint surface is equal to or less than 40%, or an amount of crystal grain straining in the joint surface is equal to or less than 0.03%.
    Type: Application
    Filed: April 4, 2005
    Publication date: November 29, 2007
    Applicant: Mitsubishi Materials Corporation
    Inventors: Toshiyuki Nagase, Yoshiyuki Nagatomo, Kazuaki Kubo, Takeshi Negishi
  • Publication number: 20060120198
    Abstract: There is provided a non-volatile memory capable of being supplied with two varieties of externally supplied voltages, stabilizing the operation thereof, at a voltage in the vicinity of a threshold voltage for switching over between the externally supplied voltages, and stabilizing the operation thereof, at the times of writing and erasing, respectively. The non-volatile memory comprises a power supply circuit incorporating a hysteresis comparator having two voltage levels for the threshold voltage, wherein by detection of 2.3V at a time when an externally supplied voltage rises, a detection signal goes to an “H” level, whereupon an internal step-down circuit, made up of a constant voltage circuit, and so forth, comes into action, generating an internal operation voltage at 2.2V to be subsequently supplied, and thereafter, by detection of 2.1V, the detection signal goes to an “L” level, whereupon the externally supplied voltage, as it is, is supplied as the internal operation voltage.
    Type: Application
    Filed: January 23, 2006
    Publication date: June 8, 2006
    Inventor: Kazuaki Kubo
  • Patent number: 7016231
    Abstract: There is provided a non-volatile memory capable of being supplied with two varieties of externally supplied voltages, stabilizing the operation thereof, at a voltage in the vicinity of a threshold voltage for switching over between the externally supplied voltages, and stabilizing the operation thereof, at the times of writing and erasing, respectively. The non-volatile memory comprises a power supply circuit incorporating a hysteresis comparator having two voltage levels for the threshold voltage, wherein by detection of 2.3V at a time when an externally supplied voltage rises, a detection signal goes to an “H” level, whereupon an internal step-down circuit, made up of a constant voltage circuit, and so forth, comes into action, generating an internal operation voltage at 2.2V to be subsequently supplied, and thereafter, by detection of 2.1V, the detection signal goes to an “L” level, whereupon the externally supplied voltage, as it is, is supplied as the internal operation voltage.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: March 21, 2006
    Assignee: Renesas Technology Corp.
    Inventor: Kazuaki Kubo
  • Publication number: 20050105339
    Abstract: There is provided a non-volatile memory capable of being supplied with two varieties of externally supplied voltages, stabilizing the operation thereof, at a voltage in the vicinity of a threshold voltage for switching over between the externally supplied voltages, and stabilizing the operation thereof, at the times of writing and erasing, respectively. The non-volatile memory comprises a power supply circuit incorporating a hysteresis comparator having two voltage levels for the threshold voltage, wherein by detection of 2.3V at a time when an externally supplied voltage rises, a detection signal goes to an “H” level, whereupon an internal step-down circuit, made up of a constant voltage circuit, and so forth, comes into action, generating an internal operation voltage at 2.2V to be subsequently supplied, and thereafter, by detection of 2.1V, the detection signal goes to an “L” level, whereupon the externally supplied voltage, as it is, is supplied as the internal operation voltage.
    Type: Application
    Filed: October 18, 2004
    Publication date: May 19, 2005
    Inventor: Kazuaki Kubo
  • Patent number: 6515932
    Abstract: A memory circuit allowing data to be read when a source voltage decreases below the threshold of a selecting transistor comprises a selecting transistor and a series-connected memory transistor, a power source for supplying a source voltage, a voltage detecting circuit for detecting a voltage of the source voltage, a boosting circuit for boosting the source voltage when it has fallen to a value near or below the threshold voltage of the selecting transistor, and a boosted voltage detecting circuit for detecting the boosted voltage and controlling the boosting circuit to boost the source voltage to a value within a range having a lower limit greater than the threshold voltage of the selecting transistor. The boosting circuit generates a boosted voltage that is applied to a word line via high-voltage switch.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: February 4, 2003
    Assignee: Seiko Instruments Inc.
    Inventor: Kazuaki Kubo