Patents by Inventor Kazuharu Aoki

Kazuharu Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8018297
    Abstract: A balanced-unbalanced conversion circuit includes a first coupling line, an unbalanced terminal connected to the first coupling line, a ground terminal connected to the unbalanced terminal through the first coupling line, a second coupling line electromagnetically coupled to the first coupling line, a first balanced terminal connected to the second coupling line, a second balanced terminal connected to the first balanced terminal through the second coupling line, and a band-reject filter serially connected to the first coupling line to remove predetermined-band signals of high frequency signals transmitted through the first coupling line.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: September 13, 2011
    Assignee: Alps Electric Co., Ltd.
    Inventor: Kazuharu Aoki
  • Publication number: 20100301983
    Abstract: A surface-mount air-core coil is provided in which a conductive wire covered with an insulation coating is wound into a spiral shape to form a cylindrically wound coil portion, conductive wires which are not covered with the insulation coating extend from both ends of the wound coil portion to form a pair of terminal portions, and the terminal portions are soldered onto electrode lands of a circuit board. A lower side of the wound coil portion which faces the circuit board is curved, an upper side thereof is formed in a flat shape, and the curved part is mounted on the circuit board.
    Type: Application
    Filed: May 14, 2010
    Publication date: December 2, 2010
    Inventors: Toshiro Furuta, Yuji Sakuma, Toshiyuki Yamada, Kazuharu Aoki
  • Publication number: 20100007430
    Abstract: A balanced-unbalanced conversion circuit includes a first coupling line, an unbalanced terminal connected to the first coupling line, a ground terminal connected to the unbalanced terminal through the first coupling line, a second coupling line electromagnetically coupled to the first coupling line, a first balanced terminal connected to the second coupling line, a second balanced terminal connected to the first balanced terminal through the second coupling line, and a band-reject filter serially connected to the first coupling line to remove predetermined-band signals of high frequency signals transmitted through the first coupling line.
    Type: Application
    Filed: June 26, 2009
    Publication date: January 14, 2010
    Inventor: Kazuharu Aoki
  • Patent number: 7400197
    Abstract: A gain control circuit capable of keeping a constant gain without being affected by ambient temperature includes a variable resistor element connected to a power supply terminal, a control unit for controlling the resistance value of the variable resistor element on the basis of a gain control voltage, an amplifying transistor that is supplied with a power supply voltage through the variable resistor element, a current detecting resistor that is interposed between the variable resistor element and a collector of the amplifying transistor, and a voltage detecting unit that detects a drop dropped by the current detecting resistor. The dropped voltage detected by the voltage detecting unit is fed back to the control unit to control the resistance value of the variable resistor element such that a current flowing through the current detecting resistor does not vary.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: July 15, 2008
    Assignee: Alps Electric Co., Ltd.
    Inventors: Shoichi Asano, Kazuharu Aoki
  • Publication number: 20070040630
    Abstract: In an electronic circuit unit for transmitting power through a transmission line 103 formed of a conductor pattern, a matching circuit 101 is connected to an output end of a power amplifier 102. The matching circuit 101 comprises a first conductor pattern 14 having bend portions P1 to P4 provided on a first dielectric substrate 11 of a laminated substrate 10 which has a plurality of dielectric layers 11 to 13, and a second conductor pattern 15 disposed opposite the first conductor pattern 14 on an adjacent second dielectric layer 12, and connecting conductors 16 to 20 provided at at least bend portions P1 to P4 of the first and second conductor patterns.
    Type: Application
    Filed: June 12, 2006
    Publication date: February 22, 2007
    Inventor: Kazuharu Aoki
  • Publication number: 20060255858
    Abstract: A gain control circuit capable of keeping a constant gain without being affected by ambient temperature includes a variable resistor element connected to a power supply terminal, a control unit for controlling the resistance value of the variable resistor element on the basis of a gain control voltage, an amplifying transistor that is supplied with a power supply voltage through the variable resistor element, a current detecting resistor that is interposed between the variable resistor element and a collector of the amplifying transistor, and a voltage detecting unit that detects a drop dropped by the current detecting resistor. The dropped voltage detected by the voltage detecting unit is fed back to the control unit to control the resistance value of the variable resistor element such that a current flowing through the current detecting resistor does not vary.
    Type: Application
    Filed: March 22, 2006
    Publication date: November 16, 2006
    Inventors: Shoichi Asano, Kazuharu Aoki
  • Patent number: 6965759
    Abstract: A frequency synthesizer includes a first oscillator that outputs a first oscillation signal. A first phase shifter outputs two first signals which are out of phase by 90°. A second oscillator outputs a second oscillation signal. A second phase shifter outputs two second signals which are out of phase by 90°. To a first mixer, one of the first signals and one of the second signals are input. To a second mixer, the other one of the first signals and the other one of the second signals are input. An adder adds combined outputs from the first and second mixers. A phase switching device changes the phase relationship between the two first signals or the two second signals input to the first mixer and the second signal. An input allowing/prohibiting switching device allows or prohibits the second signals from being input to the first and second mixers.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: November 15, 2005
    Assignee: Alps Electric Co., Ltd.
    Inventor: Kazuharu Aoki
  • Patent number: 6608502
    Abstract: A transmission signal which is output from a power amplifier is rectified by a first rectifying circuit and is then input to a first transistor of a voltage-to-current converting circuit, while the reference voltage is output from a second rectifying circuit and is then input to a second transistor of the voltage-to-current converting circuit. The output current of the first transistor is subtracted from the output current of the second transistor via a first current-mirror circuit, and a current that is proportional to the output voltage of the power amplifier is caused to flow to a two-terminal p-n junction electronic device. Then, a voltage that is proportional to the logarithm of the current is output from across the p-n junction electronic device.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: August 19, 2003
    Assignee: Alps Electric Co., Ltd.
    Inventors: Kazuharu Aoki, Jiro Kikuchi
  • Publication number: 20030020515
    Abstract: A transmission signal which is output from a power amplifier is rectified by a first rectifying circuit and is then input to a first transistor of a voltage-to-current converting circuit, while the reference voltage is output from a second rectifying circuit and is then input to a second transistor of the voltage-to-current converting circuit. The output current of the first transistor is subtracted from the output current of the second transistor via a first current-mirror circuit, and a current that is proportional to the output voltage of the power amplifier is caused to flow to a two-terminal p-n junction electronic device. Then, a voltage that is proportional to the logarithm of the current is output from across the p-n junction electronic device.
    Type: Application
    Filed: April 17, 2002
    Publication date: January 30, 2003
    Applicant: Alps Electric Co., Ltd.
    Inventors: Kazuharu Aoki, Jiro Kikuchi
  • Patent number: 6359518
    Abstract: A signal level adjusting circuit includes a first amplifying stage in which output electrodes of output stage transistors are connected to ground through current supplies and are connected with respective output terminals, and a DC voltage at the output terminals has a first voltage value; a second amplifying stage in which control electrodes of input stage transistors are connected with respective input terminals, and a DC voltage at the input terminals has a second voltage value; and a coupling stage, connected between the output terminals and the input terminals, which includes at least one series resistor. The first amplifying stage is incorporated in a bipolar IC, and the second amplifying stage is incorporated in a CMOS IC.
    Type: Grant
    Filed: May 5, 2000
    Date of Patent: March 19, 2002
    Assignee: Alps Electric Co., Ltd.
    Inventor: Kazuharu Aoki
  • Publication number: 20020028667
    Abstract: A frequency synthesizer includes a first oscillator that outputs a first oscillation signal. A first phase shifter outputs two first signals which are out of phase by 90°. A second oscillator outputs a second oscillation signal. A second phase shifter outputs two second signals which are out of phase by 90°. To a first mixer, one of the first signals and one of the second signals are input. To a second mixer, the other one of the first signals and the other one of the second signals are input. An adder adds combined outputs from the first and second mixers. A phase switching device changes the phase relationship between the two first signals or the two second signals input to the first mixer and the second signal. An input allowing/prohibiting switching device allows or prohibits the second signals from being input to the first and second mixers.
    Type: Application
    Filed: September 6, 2001
    Publication date: March 7, 2002
    Applicant: Alps Electric Co., Ltd.
    Inventor: Kazuharu Aoki
  • Publication number: 20020024364
    Abstract: In order to shorten the lock-up time, a frequency synthesizer includes a first voltage-controlled oscillator which is controlled by a first PLL circuit and which outputs a first oscillation signal; a second voltage-controlled oscillator which is controlled by a second PLL circuit and which outputs a second oscillation signal; and a mixer which outputs a signal of addition or subtraction between the first oscillation signal and the second oscillation signal, wherein the first voltage-controlled oscillator is made to oscillate at a spacing of a first step frequency, the second voltage-controlled oscillator is made to oscillate at a spacing of a second step frequency which is lower than the first step frequency, and a reference frequency of the first PLL circuit is higher than a reference frequency of the second PLL circuit.
    Type: Application
    Filed: August 22, 2001
    Publication date: February 28, 2002
    Applicant: Alps Electric Co., Ltd.
    Inventors: Kazuharu Aoki, Shoichi Asano
  • Patent number: 6236848
    Abstract: A receive integrated circuit for a mobile telephone comprising a variable gain amplifier for amplifying a received signal with a variable gain, a low-pass filter for attenuating harmonic components of the signal amplifier by the variable gain amplifier, and a QPSK demodulator for demodulating by quadri-phase shift keying the signal having passed through the low-pass filter, wherein signal lines interconnecting the variable gain amplifier, the low-pass filter and the quadri-phase shift keying demodulator are balanced.
    Type: Grant
    Filed: March 13, 1997
    Date of Patent: May 22, 2001
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki
  • Patent number: 6177837
    Abstract: A feedback circuit is connected between the input electrode of amplifying element of an amplifying circuit of the initial stage and the output electrode of amplifying element of an amplifying circuit of the final stage. The feedback circuit is structured by a serial circuit of a voltage dropping means resulting in almost constant voltage drop regardless of an increase or decrease of current and a feedback resistor, and a bias voltage is supplied, via the feedback circuit, to an input electrode of the amplifying element in the amplifying circuit of the initial stage from an output electrode of the amplifying element in the amplifying circuit of the final stage. Thereby, current dissipation is reduced and signal loss is lowered.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: January 23, 2001
    Assignee: Alps Electric Co., Ltd.
    Inventors: Kazuharu Aoki, Shoichi Asano
  • Patent number: 6114921
    Abstract: A double-balanced modulator in which the bias voltages do not become different by a buffer amplifier or the like connected to the front stage and a carrier wave is not leaked is provided. This modulator comprises a pair of input terminals 2, 3, a pair of preamplifiers 4 for amplifying balance signals supplied to the input terminals 2 and 3, and a double-balanced differential amplifier 23 to which balance carrier signals are supplied and which further amplifies the balance signals that have been amplified by the pair of preamplifiers 4, wherein capacitors 12 are connected in series between the base of a first transistor 7 and one of the input terminals 2, 3 and between the base of a second transistor 8 and the other one of the input terminals 2, 3, respectively.
    Type: Grant
    Filed: August 13, 1998
    Date of Patent: September 5, 2000
    Assignee: Alps Electric Co. Ltd.
    Inventor: Kazuharu Aoki
  • Patent number: 5926749
    Abstract: An amplifier circuit comprises current-variable mode variable amplifying circuits and for amplifying an IF signal and a current-constant mode variable amplifying circuit for amplifying an RF signal. I and Q signals are applied to the IF-stage variable amplifying circuits and corresponding to two stages through a QPSK modulating circuit and amplified based on an AGC voltage VAGC applied thereto. The IF signal is converted into the RF signal by a mixer, which in turn is applied to the RF-stage variable amplifying circuit where it is amplified based on the AGC voltage VAGC common to the IF stages. The linearly-varied AGC voltage VAGC is converted into an exponentially-varied control current by transistors. Thus, a gain PG ?dB! of each of variable amplifying circuits is controlled linearly with the AGC voltage VAGC.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: July 20, 1999
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki, Satoshi Urabe
  • Patent number: 5900781
    Abstract: A multistage amplifier circuit comprises a current constant mode variable amplifying circuit for amplifying an input signal and current variable mode variable amplifying circuits and for further amplifying the signal amplified by the first variable amplifying circuit. An AGC voltage VAGC is commonly applied between the bases and emitters of an amplification degree control transistor of the current constant mode variable amplifying circuit and amplification degree control transistors of the current variable mode amplifying circuits. Collector currents of the transistors change exponentially with respect to the linearly-varied AGC voltage VAGC. Further, currents each proportional to the collector current of the transistor flow in the transistors. Thus, the gain PG ?dB! of the current constant mode variable amplifying circuit changes linearly with the AGC voltage VAGC.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: May 4, 1999
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki, Satoshi Urabe
  • Patent number: 5900782
    Abstract: An object of the present invention is to provide an AGC voltage correction circuit unaffected by a change in temperature.Since base-emitter voltages V.sub.BE of transistors Q9 and Q10 constituting a first reference current source 7 have temperature dependency, the variations of the gains of amplification transistors Q17 and Q18 dependent on temperature are diminished. Since transistors Q1 and Q2 constituting a second reference current source 2 have temperature dependency, a gain slope concerning amplification transistors Q17 and Q18 relative to temperature is corrected linearly.
    Type: Grant
    Filed: April 16, 1997
    Date of Patent: May 4, 1999
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki, Satoshi Urabe
  • Patent number: 5471654
    Abstract: A transmitting/receiving unit capable of setting the level of power for transmitting an output frequency signal, which correctly correspond to the level of a received frequency signal, without dependency upon change in the environmental temperature, the transmitting/receiving unit including a signal transmitting portion; and a signal receiving portion so as to be capable of generating an output signal, the level of which depends upon the level of a received signal, wherein the signal transmitting portion includes first variable-gain amplifying means having an amplified gain which is varied by first AGC voltage, the signal receiving portion includes second variable-gain amplifying means having an amplified gain which is varied by second AGC voltage, wave-detection means for generating DC voltage which is in proportion to level of an output signal from the second variable-gain amplifying means, and temperature-dependent-type automatic gain control voltage generating means for converting the DC voltage into AGC
    Type: Grant
    Filed: May 20, 1994
    Date of Patent: November 28, 1995
    Assignee: Alps Electric Co., Ltd.
    Inventors: Mitsunari Okazaki, Kazuharu Aoki
  • Patent number: 5327097
    Abstract: There is provided a gain control circuit which comprises a circuit unit composed of a transistor Q.sub.11, a first gain control unit 12 including transistors Q.sub.12 and Q.sub.13 having emitters connected to each other and a choke coil L.sub.1 having an end connected to the collector of the transistor Q.sub.12 and the other end connected to the collector of the transistor Q.sub.13 for checking a high frequency signal current, and a second gain control unit 15 including transistors Q.sub.14 and Q.sub.15 having emitters connected to each other. Then, the transistor Q.sub.11 of the circuit unit is connected to the node where the emitters of the first gain control unit 12 are connected to each other and the node where the transistor Q.sub.13 of the first gain control unit 12 is connected to the choke coil L.sub.1 is connected to the node where the emitters of the second gain control unit 15 are connected to each other, and a high frequency is input to the base of the transistor Q.sub.11 of the circuit unit.
    Type: Grant
    Filed: January 19, 1993
    Date of Patent: July 5, 1994
    Assignee: Alps Electric Co., Ltd.
    Inventors: Sadao Igarashi, Kazuharu Aoki