Patents by Inventor Kazuhide Abe

Kazuhide Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11139235
    Abstract: A semiconductor device has a semiconductor substrate, a first insulating film formed on a surface of the semiconductor substrate, a first recess formed in the first insulating film, a first barrier film formed on an inner surface of the first insulating film except a top peripheral region of the first trench, a first conductive film formed in the first trench, and a covering film formed on an upper surface and a top peripheral region of the first conductive film and an upper surface of the first barrier film. The first conductive film includes copper.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: October 5, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Kazuhide Abe
  • Publication number: 20190237401
    Abstract: A semiconductor device has a semiconductor substrate, a first insulating film formed on a surface of the semiconductor substrate, a first recess formed in the first insulating film, a first barrier film formed on an inner surface of the first insulating film except a top peripheral region of the first trench, a first conductive film formed in the first trench, and a covering film formed on an upper surface and a top peripheral region of the first conductive film and an upper surface of the first barrier film. The first conductive film includes copper.
    Type: Application
    Filed: April 8, 2019
    Publication date: August 1, 2019
    Inventor: Kazuhide Abe
  • Patent number: 10256184
    Abstract: A semiconductor device has a semiconductor substrate, a first insulating film formed on a surface of the semiconductor substrate, a first recess formed in the first insulating film, a first barrier film formed on an inner surface of the first insulating film except a top peripheral region of the first trench, a first conductive film formed in the first trench, and a covering film formed on an upper surface and a top peripheral region of the first conductive film and an upper surface of the first barrier film. The first conductive film includes copper.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: April 9, 2019
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Kazuhide Abe
  • Patent number: 10252528
    Abstract: According to one embodiment, an inkjet recording head includes a plurality of ink pressure chambers arranged in a first direction, a nozzle communicating with each of the ink pressure chambers, a plurality of individual ink supply paths which are arranged in a second direction and communicate with one end of each of the ink pressure chambers, a plurality of individual ink discharge paths which are arranged in the second direction and communicate with another end of each of the ink pressure chambers, a plurality of actuators configured to apply pressure to ink in the ink pressure chambers, a common ink supply path communicating with an end of each of the individual ink supply paths, and a common ink discharge path communicating with an end of each of the individual ink discharge paths.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: April 9, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba TEC Kabushiki Kaisha
    Inventors: Takashi Kawakubo, Kazuhide Abe, Ryutaro Kusunoki
  • Publication number: 20180194134
    Abstract: According to one embodiment, an inkjet recording head includes a plurality of ink pressure chambers arranged in a first direction, a nozzle communicating with each of the ink pressure chambers, a plurality of individual ink supply paths which are arranged in a second direction and communicate with one end of each of the ink pressure chambers, a plurality of individual ink discharge paths which are arranged in the second direction and communicate with another end of each of the ink pressure chambers, a plurality of actuators configured to apply pressure to ink in the ink pressure chambers, a common ink supply path communicating with an end of each of the individual ink supply paths, and a common ink discharge path communicating with an end of each of the individual ink discharge paths.
    Type: Application
    Filed: August 25, 2017
    Publication date: July 12, 2018
    Inventors: Takashi Kawakubo, Kazuhide Abe, Ryutaro Kusunoki
  • Patent number: 9495494
    Abstract: The circuit simulating method according to an embodiment includes obtaining a first electrical characteristic value of a circuit element that operates under a predetermined operational condition. The circuit simulating method includes correcting the first electrical characteristic value based on a period in which application of an electrical stress equal to or higher than a reference value is stopped during operation of the circuit element.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: November 15, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomohisa Kimura, Kazuhide Abe
  • Patent number: 9415597
    Abstract: An ink jet head includes: a pressure chamber to be filled with ink formed in a pressure chamber structure, the pressure chamber in which an etching limiter made of a material different from a material of the pressure chamber structure is formed on an inner wall surface of the pressure chamber; a nozzle plate comprising a nozzle that leading to the pressure chamber and a movable range fitted to the etching limiter; and a flat driver comprising a piezoelectric body to operate the movable range and arranged on the nozzle plate.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: August 16, 2016
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventors: Takashi Kawakubo, Kazuhide Abe, Yasushi Tomizawa, Ryuichi Arai, Ryutaro Kusunoki, Osamu Takagi
  • Patent number: 9412825
    Abstract: A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: August 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takaaki Yasumoto, Naoko Yanase, Kazuhide Abe, Takeshi Uchihara, Yasunobu Saito, Toshiyuki Naka, Akira Yoshioka, Tasuku Ono, Tetsuya Ohno, Hidetoshi Fujimoto, Shingo Masuko, Masaru Furukawa, Yasunari Yagi, Miki Yumoto, Atsuko Iida, Yukako Murakami, Takako Motai
  • Patent number: 9358785
    Abstract: According to one embodiment, an inkjet head includes a nozzle plate including a first surface, a second surface opposite to the first surface, a through hole configured to make the first surface communicate with the second surface, and a cylindrical member integrally extending from the second surface by extending the through hole. An ink pressure chamber communicating with the cylindrical member and the through hole is provided on the second surface side of the nozzle plate. This inkjet head also includes an actuator which discharges ink in the ink pressure chamber from the through hole by displacing the nozzle plate.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: June 7, 2016
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
    Inventors: Takashi Kawakubo, Kazuhide Abe, Yasushi Tomizawa, Ryuichi Arai, Ryutaro Kusunoki, Osamu Takagi
  • Patent number: 9299627
    Abstract: A semiconductor package of an embodiment includes: a semiconductor chip having a signal input terminal and a signal output terminal; and a cap unit that is formed on the semiconductor chip. The cap unit includes a concave portion forming a hollow structure between the semiconductor chip and the cap unit, a first through electrode electrically connected to the signal input terminal, and a second through electrode electrically connected to the signal output terminal. Of the inner side surfaces of the concave portion, a first inner side surface and a second inner side surface facing each other are not parallel to each other.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: March 29, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihiko Nagano, Tadahiro Sasaki, Kazuhide Abe, Hiroshi Yamada, Kazuhiko Itaya, Taihei Nakada
  • Publication number: 20160079410
    Abstract: A semiconductor device includes a first electrode, a second electrode, a third electrode, and a nitride semiconductor layer. The first electrode has a first surface. The second electrode has a second surface. The second surface is provided with a plurality of convex portions and concave portions. The second electrode is spaced from the first electrode in a first direction. The third electrode is spaced from the first electrode in a second direction intersecting the first direction. The nitride semiconductor layer is provided between the first surface and the second surface, and between the third electrode and the second surface.
    Type: Application
    Filed: March 3, 2015
    Publication date: March 17, 2016
    Inventors: Takaaki YASUMOTO, Naoko YANASE, Kazuhide ABE, Takeshi UCHIHARA, Yasunobu SAITO, Hidetoshi FUJIMOTO, Masaru FURUKAWA, Yasunari YAGI, Miki YUMOTO, Atsuko IIDA, Yukako MURAKAMI
  • Publication number: 20160070836
    Abstract: The circuit simulating method according to an embodiment includes obtaining a first electrical characteristic value of a circuit element that operates under a predetermined operational condition. The circuit simulating method includes correcting the first electrical characteristic value based on a period in which application of an electrical stress equal to or higher than a reference value is stopped during operation of the circuit element.
    Type: Application
    Filed: March 11, 2015
    Publication date: March 10, 2016
    Inventors: Tomohisa Kimura, Kazuhide Abe
  • Publication number: 20160052272
    Abstract: According to one embodiment, an inkjet head includes a nozzle plate including a first surface, a second surface opposite to the first surface, a through hole configured to make the first surface communicate with the second surface, and a cylindrical member integrally extending from the second surface by extending the through hole. An ink pressure chamber communicating with the cylindrical member and the through hole is provided on the second surface side of the nozzle plate. This inkjet head also includes an actuator which discharges ink in the ink pressure chamber from the through hole by displacing the nozzle plate.
    Type: Application
    Filed: December 17, 2014
    Publication date: February 25, 2016
    Inventors: Takashi KAWAKUBO, Kazuhide ABE, Yasushi TOMIZAWA, Ryuichi ARAI, Ryutaro KUSUNOKI, Osamu TAKAGI
  • Publication number: 20150343783
    Abstract: A method of manufacturing an inkjet head includes: forming an annular groove on a first surface of a substrate made of a first material; forming a side wall by filling a second material in the annular groove and forming a nozzle plate by forming a thin film made of the second material on the first surface of the substrate; forming a ring-shaped piezoelectric element on the nozzle plate surrounded by the side wall, the piezoelectric element comprising a lower electrode, a piezoelectric film, and an upper electrode; forming a ink chamber disposed over an area of a lower surface of the nozzle plate that is surrounded by the side wall from a second surface opposite the first surface of the substrate, the ink chamber being formed by a single dry etching process; and forming a nozzle to the nozzle plate positioned inside of the annular piezoelectric element.
    Type: Application
    Filed: August 10, 2015
    Publication date: December 3, 2015
    Inventors: Takashi KAWAKUBO, Kazuhide ABE, Yasushi TOMIZAWA, Ryuichi ARAI, Ryutaro KUSUNOKI, Osamu TAKAGI
  • Patent number: 9153680
    Abstract: A stimulated phonon emission device of an embodiment is provided with a first electroconductive type of semiconductor substrate of an indirect transition type semiconductor crystal, a second electroconductive type of well region provided in the semiconductor substrate, an element isolation region deeper than the well region, an element region surrounded by the element isolation region, and a field-effect transistor having a plurality of gate electrodes which are formed in the well region in the element region, are parallel to each other, and are arranged at a constant pitch and first electroconductive type of source region and drain region provided in the element regions on the both sides of the gate electrode.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: October 6, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhide Abe, Kazuhiko Itaya
  • Publication number: 20150263700
    Abstract: According to one embodiment, a semiconductor device includes a GaN-based semiconductor layer, a resonator that uses a first portion of the GaN-based semiconductor layer as a piezoelectric layer to resonate, and a transistor that uses a second portion of the GaN-based semiconductor layer as a channel layer.
    Type: Application
    Filed: September 2, 2014
    Publication date: September 17, 2015
    Inventors: Takaaki YASUMOTO, Naoko YANASE, Kazuhide ABE, Takeshi UCHIHARA, Yasunobu SAITO, Toshiyuki NAKA, Akira YOSHIOKA, Tasuku ONO, Tetsuya OHNO, Hidetoshi FUJIMOTO, Shingo MASUKO, Masaru FURUKAWA, Yasunari YAGI, Miki YUMOTO, Atsuko IIDA, Yukako MURAKAMI, Yoshikazu SUZUKI
  • Publication number: 20150263152
    Abstract: A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.
    Type: Application
    Filed: August 29, 2014
    Publication date: September 17, 2015
    Inventors: Takaaki YASUMOTO, Naoko YANASE, Kazuhide ABE, Takeshi UCHIHARA, Yasunobu SAITO, Toshiyuki NAKA, Akira YOSHIOKA, Tasuku ONO, Tetsuya OHNO, Hidetoshi FUJIMOTO, Shingo MASUKO, Masaru FURUKAWA, Yasunari YAGI, Miki YUMOTO, Atsuko IIDA, Yukako MURAKAMI, Takako MOTAI
  • Patent number: 9117931
    Abstract: A semiconductor device according to an embodiment has: a semiconductor substrate; an acoustic resonator formed on the semiconductor substrate, having a semiconductor layer including impurity electrically isolated from the substrate by depletion layer and configured to resonate at a predetermined resonance frequency based on acoustic standing wave excited in the semiconductor layer; a temperature detector formed on the semiconductor substrate and configured to detect temperature of the semiconductor substrate; a calculating unit formed on the semiconductor substrate and configured to perform calculation of temperature compensation based on the temperature detected by the temperature detector, kind of the impurity and concentration of the impurity; and a controller formed on the semiconductor substrate and configured to control the resonance frequency based on a result of the calculation by the calculating unit.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: August 25, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhide Abe, Atsuko Iida, Kazuhiko Itaya, Junji Wadatsumi, Shouhei Kousai
  • Patent number: 9041182
    Abstract: A semiconductor package according to embodiments includes: a semiconductor chip including a front electrode on a front surface thereof and a back electrode on a back surface thereof; a front-side cap portion including an air gap in a portion between the semiconductor chip and the front-side cap portion and a front-side penetrating electrode, and is positioned to face the front surface of the semiconductor chip; a back-side cap portion bonded with a first cap portion to hermetically seal the semiconductor chip, includes an air gap at least in a portion between the semiconductor chip and the back-side cap portion and a back-side penetrating electrode, and is positioned to face the back surface of the semiconductor chip; a front-side connecting portion which electrically connects the front electrode and the front-side penetrating electrode; and a back-side connecting portion which electrically connects the back electrode and the back-side penetrating electrode.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: May 26, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihiko Nagano, Kazuhide Abe, Hiroshi Yamada, Kazuhiko Itaya, Taihei Nakada
  • Publication number: 20150085022
    Abstract: An ink jet head includes: a pressure chamber to be filled with ink formed in a pressure chamber structure, the pressure chamber in which an etching limiter made of a material different from a material of the pressure chamber structure is formed on an inner wall surface of the pressure chamber; a nozzle plate comprising a nozzle that leading to the pressure chamber and a movable range fitted to the etching limiter; and a flat driver comprising a piezoelectric body to operate the movable range and arranged on the nozzle plate.
    Type: Application
    Filed: March 6, 2014
    Publication date: March 26, 2015
    Applicants: TOSHIBA TEC KABUSHIKI KAISHA, KABUSHIKI KAISHA TOSHIBA
    Inventors: Takashi KAWAKUBO, Kazuhide ABE, Yasushi TOMIZAWA, Ryuichi ARAI, Ryutaro KUSUNOKI, Osamu TAKAGI