Patents by Inventor Kazuhiko Kumagai

Kazuhiko Kumagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8159297
    Abstract: A transmission device includes an amplifier that amplifies a transmission signal according to a voltage to be applied, an envelope detector that detects an envelope signal of the transmission signal, a rate decreasing unit that decreases changing rate of the envelope signal detected by the envelope detector, and a voltage controller that changes the voltage applied to the amplifier according to the envelope signal whose changing rate is decreased by the rate decreasing unit.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: April 17, 2012
    Assignee: Fujitsu Limited
    Inventor: Kazuhiko Kumagai
  • Publication number: 20100327971
    Abstract: A transmission device includes an amplifier that amplifies a transmission signal according to a voltage to be applied, an envelope detector that detects an envelope signal of the transmission signal, a rate decreasing unit that decreases changing rate of the envelope signal detected by the envelope detector, and a voltage controller that changes the voltage applied to the amplifier according to the envelope signal whose changing rate is decreased by the rate decreasing unit.
    Type: Application
    Filed: June 21, 2010
    Publication date: December 30, 2010
    Applicant: FUJITSU LIMITED
    Inventor: Kazuhiko Kumagai
  • Patent number: 6873621
    Abstract: A system for controlling a bandwidth when receiving and reassembling a consecutive data stream transferred while segmented by AAL1 format cells which enables correct determination of non-P and P formats and reassembly of cells even when error arises in multiple bits including the CSI bit of an AAL1 cell or when adding dummy cells and thereby enabling prevention of a gap in data in a frame, comprising, in a data reassembly unit which reassembles received cells, an 8-cell buffer for storing 8 cells of a cycle of a sequence count (SC) of 0 to 7 and sending the cells out to a later stage after a check unit of a sequence number (SN) field confirms normalcy of the cells and a control unit for control so that the number of P format cells stored in the 8-cell buffer becomes 1 cell when 8 cells are stored in the 8-cell buffer.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: March 29, 2005
    Assignee: Fujitsu Limited
    Inventors: Jyoei Kamoi, Yoshihiro Uchida, Naoki Aihara, Mikio Nakayama, Kazuhito Yasue, Kazuhiko Kumagai
  • Publication number: 20010017858
    Abstract: A system for controlling a bandwidth when receiving and reassembling a consecutive data stream transferred while segmented by AAL1 format cells which enables correct determination of non-P and P formats and reassembly of cells even when error arises in multiple bits including the CSI bit of an AAL1 cell or when adding dummy cells and thereby enabling prevention of a gap in data in a frame, comprising, in a data reassembly unit which reassembles received cells, an 8-cell buffer for storing 8 cells of a cycle of a sequence count (SC) of 0 to 7 and sending the cells out to a later stage after a check unit of a sequence number (SN) field confirms normalcy of the cells and a control unit for control so that the number of P format cells stored in the 8-cell buffer becomes 1 cell when 8 cells are stored in the 8-cell buffer.
    Type: Application
    Filed: January 12, 2001
    Publication date: August 30, 2001
    Applicant: Fujitsu Limited
    Inventors: Jyoei Kamoi, Yoshihiro Uchida, Naoki Aihara, Mikio Nakayama, Kazuhito Yasue, Kazuhiko Kumagai