Patents by Inventor Kazuhiko Oyama
Kazuhiko Oyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100281584Abstract: Disclosed are compounds that are utilizable as systemic insecticides and possess excellent systemic properties. Compounds represented by formula (1) have excellent systemic insecticidal activity. Accordingly, a composition comprising as an active ingredient the compound of formula (1) or salt thereof is useful as a systemic insecticide.Type: ApplicationFiled: December 19, 2008Publication date: November 4, 2010Inventors: Ryo Horikoshi, Mitsuyuki Yabuzaki, Shinji Sakurai, Kazuhiko Oyama, Masaaki Mitomi
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Publication number: 20100113525Abstract: Disclosed is a pest control composition comprising at least one pyripyropene derivative of formula (I) or agriculturally and horticulturally acceptable salt thereof and at least one other pest control agent as active ingredients. The combined use of the two ingredients can provide a better insecticidal effect.Type: ApplicationFiled: March 10, 2008Publication date: May 6, 2010Applicant: MEIJI SEIKA KAISHA, LTD.Inventors: Ryo Horikoshi, Kazuhiko Oyama, Mitsuyuki Yabuzaki
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Patent number: 7549088Abstract: Disclosed is a method of determining a failure in an information system including a transmission apparatus for transmitting control information and a reception apparatus connected to the transmission apparatus in such a manner as to enable information to be transmitted and received for receiving the control information, the reception apparatus transmitting response information to the received control information, wherein the transmission apparatus obtains, as first clock time, clock time of the most recently transmitted control information if the response information to the control information cannot be obtained within predetermined time period, wherein the transmission apparatus obtains, as second clock time, later one of clock time of the response information most recently transmitted by the reception apparatus and clock time of the control information most recently received by the reception apparatus, and wherein the transmission apparatus determines failure location based on the first clock time and the sType: GrantFiled: June 14, 2005Date of Patent: June 16, 2009Assignee: Fujitsu LimitedInventors: Kazuhiko Oyama, Koji Hanada
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Publication number: 20090137634Abstract: Disclosed is a composition for use as a pest control agent, comprising a compound represented by formula (I) or an agriculturally and horticulturally acceptable salt thereof as active ingredient and an agriculturally and horticulturally acceptable carrier:Type: ApplicationFiled: December 23, 2008Publication date: May 28, 2009Inventors: Kimihiko Goto, Ryo Horikoshi, Mariko Tsuchida, Kazuhiko Oyama, Satoshi Omura, Hiroshi Tomoda, Toshiaki Sunazuka
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Patent number: 7518347Abstract: A regulator circuit is provided which has a reference voltage outputting unit, a first operational amplifier, a voltage-dividing unit, and a second operational amplifier. The reference voltage outputting unit is connected to a power source voltage, has a rectifying element, and outputs a first reference voltage. The first reference voltage is input to the first operational amplifier, and the first operational amplifier outputs a second reference voltage equal to the first reference voltage. The second reference voltage is input to the voltage-dividing unit, and the voltage-dividing unit outputs a third reference voltage having a voltage lower than the second reference voltage. The third reference voltage is input to the second operational amplifier, and the second operational amplifier outputs an output voltage equal to the third reference voltage.Type: GrantFiled: August 16, 2007Date of Patent: April 14, 2009Assignee: Oki Semiconductor Co., Ltd.Inventor: Kazuhiko Oyama
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Patent number: 7491738Abstract: There is provided a pest control agent comprising a compound represented by formula (I) as active ingredient.Type: GrantFiled: May 31, 2006Date of Patent: February 17, 2009Assignees: Meiji Seika Kaisha, Ltd., The Kitasato Institute (A School Juridical Person)Inventors: Kimihiko Goto, Ryo Horikoshi, Mariko Tsuchida, Kazuhiko Oyama, Satoshi Omura, Hiroshi Tomoda, Toshiaki Sunazuka
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Publication number: 20080067986Abstract: A regulator circuit is provided which has a reference voltage outputting unit, a first operational amplifier, a voltage-dividing unit, and a second operational amplifier. The reference voltage outputting unit is connected to a power source voltage, has a rectifying element, and outputs a first reference voltage. The first reference voltage is input to the first operational amplifier, and the first operational amplifier outputs a second reference voltage equal to the first reference voltage. The second reference voltage is input to the voltage-dividing unit, and the voltage-dividing unit outputs a third reference voltage having a voltage lower than the second reference voltage. The third reference voltage is input to the second operational amplifier, and the second operational amplifier outputs an output voltage equal to the third reference voltage.Type: ApplicationFiled: August 16, 2007Publication date: March 20, 2008Applicant: OKI ELECTRIC INDUSTRY CO., LTD.Inventor: Kazuhiko Oyama
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Publication number: 20070203181Abstract: Disclosed are compounds that have excellent insecticidal activity and are usable as agricultural and horticultural insecticides. Compounds represented by formula (I) or agriculturally and horticulturally acceptable acid addition salts thereof have excellent insecticidal activity and are usable as agricultural and horticultural insecticides.Type: ApplicationFiled: August 3, 2005Publication date: August 30, 2007Applicants: MEIJI SEIKA KAISHA, LTD., NIPPON KAYAKU CO., LTD.Inventors: Kazumi Yamamoto, Ryo Horikoshi, Kazuhiko Oyama, Hiroshi Kurihara, Shizuo Shimano, Takaaki Miyake, Hiroki Hotta, Jun Iwabuchi
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Publication number: 20070024367Abstract: Provided in a constant-current generation circuit is an OP AMP which includes a bias circuit, differential stage and amplification stage. In the OP AMP, a capacitance is provided between a control terminal which receives a start-up signal EN and a node NGATE. In a start-up operation of the circuit, the node NGATE can more rapidly rise from a VSS to a predetermined voltage by rising a specific voltage in synchronously with a switching timing of the start-up signal EN by virtue of a coupling effect.Type: ApplicationFiled: April 19, 2006Publication date: February 1, 2007Applicant: Oki Electric Industry Co., Ltd.Inventor: Kazuhiko Oyama
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Patent number: 7161848Abstract: A data write circuit of a semiconductor storage device is provided in which a multi-bit write method can be employed even if data input takes a long time. The data write circuit includes a multi-bit decoder and data latch circuit for sequentially latching a plurality of data to be respectively written to a plurality of memory cells of multi-bits and are sequentially input in accordance with a change of an input multi-bit address, a column decoder for respectively applying latched data to sources of the memory cells based on a column address among the input address, and a cell drain voltage generator for simultaneously applying high cell drain voltage (approx. 5.0 volts) for writing data to the drains of the memory cells when all of the data are latched and are applied to the sources of the memory cells so as to respectively write the data to the memory cells.Type: GrantFiled: May 23, 2005Date of Patent: January 9, 2007Assignee: Oki Electric Industry Co., Ltd.Inventor: Kazuhiko Oyama
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Publication number: 20060281780Abstract: There is provided a pest control agent comprising a compound represented by formula (I) as active ingredient.Type: ApplicationFiled: May 31, 2006Publication date: December 14, 2006Applicants: Meiji Seika Kaisha, Ltd., The Kitasato InstituteInventors: Kimihiko Goto, Ryo Horikoshi, Mariko Tsuchida, Kazuhiko Oyama, Satoshi Omura, Hiroshi Tomoda, Toshiaki Sunazuka
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Patent number: 7144843Abstract: An objective of the present invention is to provide a harmful organism control agent that possesses excellent control effect against harmful organisms and can be safely used. The present invention provides a compound of formula (1) or a salt thereof. The present invention also provides a harmful organism control agent comprising the compound of formula (1). wherein R1, n, R2, and R3 are as defined in the specification.Type: GrantFiled: January 31, 2002Date of Patent: December 5, 2006Assignee: Meiji Seika Kaisha, Ltd.Inventors: Kazuhiko Oyama, Takeshi Teraoka, Kazumi Yamamoto
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Publication number: 20060215525Abstract: Disclosed is a method of determining a failure in an information system including a transmission apparatus for transmitting control information and a reception apparatus connected to the transmission apparatus in such a manner as to enable information to be transmitted and received for receiving the control information, the reception apparatus transmitting response information to the received control information, wherein the transmission apparatus obtains, as first clock time, clock time of the most recently transmitted control information if the response information to the control information cannot be obtained within predetermined time period, wherein the transmission apparatus obtains, as second clock time, later one of clock time of the response information most recently transmitted by the reception apparatus and clock time of the control information most recently received by the reception apparatus, and wherein the transmission apparatus determines failure location based on the first clock time and the sType: ApplicationFiled: June 14, 2005Publication date: September 28, 2006Applicant: FUJITSU LIMITEDInventors: Kazuhiko Oyama, Koji Hanada
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Patent number: 7022855Abstract: An objective of the present invention is to provide an ectoparasite control agent for homothermic animals, which has high control effect and is safe. The compounds according to the present invention are compounds represented by formula (I) and salts thereof: wherein R1 represents optionally substituted alkyl; optionally substituted alkenyl; optionally substituted alkynyl; OR5 wherein R5 represents optionally substituted alkyl, optionally substituted alkenyl, or optionally substituted alkynyl; or SR5 wherein R5 is as defined above, R2 represents optionally substituted alkyl, any one of R3 and R4 represents hydrogen and the other represents fluorine, chlorine, bromine, or CF3, and X represents fluorine or chlorine.Type: GrantFiled: October 9, 2003Date of Patent: April 4, 2006Assignee: Meiji Seika Kaisha, Ltd.Inventors: Kazumi Yamamoto, Kazuhiko Oyama, Masayo Sakai, Ryo Horikoshi
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Publication number: 20060044869Abstract: A data write circuit of a semiconductor storage device is provided in which a multi-bit write method can be employed even if data input takes a long time. The data write circuit includes a multi-bit decoder and data latch circuit for sequentially latching a plurality of data to be respectively written to a plurality of memory cells of multi-bits and are sequentially input in accordance with a change of an input multi-bit address, a column decoder for respectively applying latched data to sources of the memory cells based on a column address among the input address, and a cell drain voltage generator for simultaneously applying high cell drain voltage (approx. 5.0 volts) for writing data to the drains of the memory cells when all of the data are latched and are applied to the sources of the memory cells so as to respectively write the data to the memory cells.Type: ApplicationFiled: May 23, 2005Publication date: March 2, 2006Applicant: Oki Electric Industry Co., Ltd.Inventor: Kazuhiko Oyama
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Patent number: 6956781Abstract: When a first memory cell storing data ‘0’ is read, an associated word line is set at an ‘H’ level, and an associated NMOS is turn on by a signal having an ‘H’ level so as to select the first memory cell. In the first memory cell, a drain voltage is reduced to a grounding level via the NMOS, and an electrical potential difference is generated between a source and the drain. However, no channel is formed so that no electrical current flows. Since a parasitic capacitance exists between associated bit lines, the electrical potential of a node is reduced to the ground level due to the coupling effect of the parasitic capacitance. Accordingly, a charging current flows to the node. In addition, a direct current flows from the node to the ground via another NMOS. Consequently, electrical charging to the parasitic capacitance starts earlier, and a reading delay time can be reduced.Type: GrantFiled: February 2, 2004Date of Patent: October 18, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Kazuhiko Oyama
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Publication number: 20050024966Abstract: When a first memory cell storing data ‘0’ is read, an associated word line is set at an ‘H’ level, and an associated NMOS is turn on by a signal having an ‘H’ level so as to select the first memory cell. In the first memory cell, a drain voltage is reduced to a grounding level via the NMOS, and an electrical potential difference is generated between a source and the drain. However, no channel is formed so that no electrical current flows. Since a parasitic capacitance exists between associated bit lines, the electrical potential of a node is reduced to the ground level due to the coupling effect of the parasitic capacitance. Accordingly, a charging current flows to the node. In addition, a direct current flows from the node to the ground via another NMOS. Consequently, electrical charging to the parasitic capacitance starts earlier, and a reading delay time can be reduced.Type: ApplicationFiled: February 2, 2004Publication date: February 3, 2005Inventor: Kazuhiko Oyama
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Patent number: 6791373Abstract: As a power-supply voltage VCC is applied to a second terminal, a latch is reset by a reset signal POR from a power-on reset unit. Subsequently, as the voltage of a signal IN applied to a first terminal is increased to higher than the voltage VCC by a threshold voltage Vth of a PMOS 11, the PMOS 11 turns on, causing a node N1 to become “H.” Thus, a test mode is set in the latch. Subsequently, even if the signal IN is reduced to VCC or lower, the test mode is maintained. A high-voltage test can be conducted by increasing the power-supply voltage at the second terminal, thereby eliminating the need for applying the first terminal with a higher voltage than required to set the test mode. It is therefore possible to prevent a gate oxide film of a buffer from being destroyed.Type: GrantFiled: September 30, 2003Date of Patent: September 14, 2004Assignee: Oki Electric Industry Co., Ltd.Inventor: Kazuhiko Oyama
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Publication number: 20040130355Abstract: As a power-supply voltage VCC is applied to a second terminal, a latch is reset by a reset signal POR from a power-on reset unit. Subsequently, as the voltage of a signal IN applied to a first terminal is increased to higher than the voltage VCC by a threshold voltage Vth of a PMOS 11, the PMOS 11 turns on, causing a node N1 to become “H.” Thus, a test mode is set in the latch. Subsequently, even if the signal IN is reduced to VCC or lower, the test mode is maintained. A high-voltage test can be conducted by increasing the power-supply voltage at the second terminal, thereby eliminating the need for applying the first terminal with a higher voltage than required to set the test mode. It is therefore possible to prevent a gate oxide film of a buffer from being destroyed.Type: ApplicationFiled: September 30, 2003Publication date: July 8, 2004Applicant: Oki Electric Industry Co., Ltd.Inventor: Kazuhiko Oyama
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Publication number: 20040087618Abstract: An objective of the present invention is to provide an ectoparasite control agent for homothermic animals, which has high control effect and is safe.Type: ApplicationFiled: October 9, 2003Publication date: May 6, 2004Applicant: Meiji Seika Kaisha, Ltd.Inventors: Kazumi Yamamoto, Kazuhiko Oyama, Masayo Sakai, Ryo Horikoshi